CRI: IAD Keeping Pace with Growing Computing Needs: A Strategy for Enhancing Multi-Core Microprocessor Research and Education at Cornell University
CRI: IAD Keeping Pace with Growing Computing Needs: A Strategy for Enhancing Multi-Core Microprocessor Research and Education at Cornell University
批准号:
0708788
负责人:
David Albonesi
金额:
$9.39万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2007
资助国家:
美国
项目状态:
已结题
起止时间:
2007-10-01 至 2008-09-30
中文摘要
[0708788]跟上不断增长的计算需求:一种增强多核微处理器的策略康奈尔大学的研究和教育david albones由于一些因素,即使是一个中等规模的计算机体系结构学术研究小组的计算需求近年来也急剧上升。为了跟上快速增长的研究和教育需求,康奈尔大学的研究小组采用了一种经济有效的方法来为实验室构建计算集群。有机会以适度的成本将目前的计算资源增加一倍,这将对研究和教育活动产生深远的影响。计算基础设施将大大提高多核计算机体系结构的研究能力。本研究致力于提高多核可靠性和功率性能效率,以及对多核设计空间的有效探索。这笔拨款所带来的额外计算能力将使研究人员能够更全面地解决这些领域的问题,同时也可以利用这些活动之间的协同作用。例如,额外的计算能力将允许通过使用预测建模来理解未来多核微架构中的综合性能、功耗和可靠性权衡。由新基础设施实现的研究将直接解决未来多核微处理器的几个关键设计挑战,因此将与美国微处理器制造商高度相关。
英文摘要
0708788CRI: IAD Keeping Pace with Growing Computing Needs: A Strategy for Enhancing Multi-Core Microprocessor Research and Education at Cornell UniversityDavid AlbonesiDue to a number of factors, the computing requirements for even a modest-size academic research group in computer architecture have risen dramatically in recent years. In order to keep pace with the rapidly growing research and educational needs, the research group at Cornell has adopted a cost-effective approach to building compute clusters for the laboratory. An opportunity exists to roughly double the present computing resources at modest cost which will have a profound impact on the research and educational activities. The computing infrastructure will greatly enhance the research capabilities in multi-core computer architecture. This research effort is on improving multi-core reliability and power-performance efficiency, and in the efficient exploration of multi-core design spaces. The additional computing capabilities enabled by this grant will permit the researchers to more comprehensively address these areas, but also to exploit the synergy among these activities. As one example, the additional computing capability will permit an understanding of the combined performance, power, and reliability tradeoffs in future multi-core microarchitectures through the use of predictive modeling. The research enabled by the new infrastructure will directly address several critical design challenges of future multi-core microprocessors, and thus will have high relevance to U.S. microprocessor manufacturers.
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