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Collaborative Research:Design, Modeling, Automation and Experimentation of Nanoscale Computing Fabric using Carbon Nanotubes

Collaborative Research:Design, Modeling, Automation and Experimentation of Nanoscale Computing Fabric using Carbon Nanotubes
合作研究:使用碳纳米管的纳米级计算结构的设计、建模、自动化和实验
批准号:
0726791
负责人:
Subhasish Mitra
金额:
$62.0万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2007
资助国家:
美国
项目状态:
已结题
起止时间:
2007-10-01 至 2011-09-30

项目摘要

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中文摘要
翻译
硅晶体管的器件尺寸一直是半导体工业取得惊人成功的根本基础,这种尺寸已经到了必须探索新的器件来取代传统硅晶体管的地步,否则,半导体产业的进步将受到严重影响。碳纳米管场效应晶体管(CNFET)具有优异的器件性能,有望成为传统硅晶体管的扩展材料。虽然近年来在单器件水平上的CNFET的科学发现方面取得了重大成就,但在这种单一器件水平的结果与在硅晶体管的器件缩放结束时将科学转化为实用设计技术所需的研究之间存在着重大差距。这项研究的目标是通过开发必要的技术来缩小这一差距,使CNFET成为替代硅晶体管的实用候选者。本研究的目标是在存在固有的限制和缺陷的情况下,使用碳纳米管场效应晶体管(CNFET)设计健壮的纳米级计算结构,并通过实验演示结构的基本组件,如处理器。这项研究的动机是这样一个事实,即CNFET是硅CMOS的有希望的扩展候选者,然而基本的纳米级的挑战阻碍了基于CNFET的高效电路和系统的成功实现。该项目包括一个跨学科研究团队,以展示强大的基于CNFET的计算结构,并在新兴的纳米计算领域教育未来一代工程师和普通公众。
英文摘要
Device scaling of silicon transistors has been the fundamental basis for the phenomenal success of the semiconductor industry.Such scaling is reaching a point where it is absolutely necessary to explore new devices as replacement for traditional silicon transistors.Otherwise, the progress of the semiconductor industry will be severely affected. Carbon Nanotube Field-Effect Transistors (CNFETs) are promising candidates as extensions to traditional Silicon transistors due to excellent device performance. While there have been significant accomplishments in scientific discovery of CNFETs in recent years at the single-device level, a major gap exists between such single-device-level results and the research required to harness the science into practical design technologies at the end of device scaling of silicon transistors. This research project targets to close this gap by developing necessary technologies required to make CNFETs practical candidates for replacing silicon transistors.The objective of this research is to design of robust nanoscale computing fabrics using Carbon Nanotube Field Effect Transistors (CNFETs) in the presence of inherent limitations and imperfections, and to experimentally demonstrate essential components of a fabric such as a processor. This research is motivated by the fact that CNFETs are promising candidates as extensions to Silicon CMOS, yet fundamental nanoscale challenges prevent successful implementations of efficient CNFET-based circuits and systems. This project includes an interdisciplinary research team to demonstrate robust CNFET-based computing fabrics, and also to educate future generations of engineers and the general public in the emerging field of nanoscale computing.
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