CAREER: New Directions in Functional Verification of Heterogeneous Multicore Architectures

功能验证被广泛认为是片上系统(SOC)设计方法中的一个主要瓶颈。由于设计复杂性的增加和最近从单处理器SOC设计到异质多核SOC(HMSOC)体系结构的范式转变的综合影响，验证的复杂性预计将进一步增加，这种体系结构有望在未来的嵌入式系统中得到广泛应用。HMSOC架构验证的一个重要瓶颈是缺乏“黄金参考模型”和相关的设计自动化技术。该项目的中心目标是开发自动化工具和技术，以大大减少未来嵌入式系统的功能验证工作。NSF职业研究的核心是三个创新概念的协同集成，以使用单一规范实现自上而下的验证：i)可以捕获各种多核SOC体系结构的统一规范语言，ii)指定体系结构的静态和动态行为的验证，以及iii)使用基于模拟的技术和形式化方法的组合生成面向覆盖的功能测试以进行实现验证。这种集成具有显著提高复杂和异类嵌入式系统验证的技术水平的潜力。自上而下验证方法的开发可以极大地减少总体验证工作，并能够生成高效和成本效益高的嵌入式系统--为公众提供低成本的日常设备，并提高安全关键设备的准确性。该项目通过两个场所寻求广泛的教育影响和研究与教育的整合：i)为本科生和研究生开发嵌入式系统课程，ii)本科生的参与和通过UF大学学者和NSF赞助的SEAGEP项目的推广。

Functional verification is widely acknowledged as a major bottleneck in System-on-Chip (SOC) design methodology. The verification complexity is expected to increase further due to the combined effects of increasing design complexity and recent paradigm shift from single processor SOC designs to heterogeneous multicore SOC (HMSOC) architectures, which are expected to receive wide use in future embedded systems. A significant bottleneck in the verification of HMSOC architectures is the lack of a "golden reference model" and associated design automation techniques. The central objective of this project is to develop automated tools and techniques to drastically reduce the functional verification effort for future embedded systems. The core of this NSF CAREER research is the synergistic integration of three innovative concepts to enable top-down validation using a single specification: i) a unified specification language that can capture a wide variety of multicore SOC architectures, ii) validation of static and dynamic behaviors of the specified architecture, and iii) coverage-directed functional test generation for implementation validation using a combination of simulation-based techniques and formal methods. This integration has potential for substantially advancing the state of the art in verification of complex and heterogeneous embedded systems. The development of top-down validation methodology can drastically reduce the overall verification effort and enable generation of efficient and cost-effective embedded systems -- low cost everyday appliances for the public and improved accuracy for safety-critical devices. This project seeks broad educational impact and integration of research and education through two venues: i) development of embedded systems courses for undergraduate and graduate students, and ii) involvement of undergraduate students and outreach through UF University Scholars and NSF-sponsored SEAGEP programs.