CSR: Small: Codesign of Accelerator Interface Software and Hardware

计算机系统性能的频繁翻倍促进了科学、教育、政府和商业方面的创新。这些改进的基础，摩尔定律提高了密度和Dennard比例降低了晶体管功率，使芯片能够以大致固定的功率和成本拥有指数级更多的晶体管。然而，即将到来的物理限制可能会迫使我们在芯片功率和成本上升之间做出选择，或者在成本最低的情况下芯片性能停滞不前。该项目寻求一种新的中间方法，称为暗硅，即使每个芯片上电的晶体管数量增加，也能保持上电晶体管的数量大致不变。未来的主流芯片将部署许多加速器，以将性能或功率提高10倍-100倍，而不是增加通用内核。这种芯片会在需要时开启一个或多个加速器，以帮助供电和/或提高性能，并让大多数其他加速器关闭。用于片上系统(SoC)的加速器已经被设计出来，用于加密、(解)压缩、网络协议、XML和图形。这项研究旨在发明和改进体系结构和系统支持，使现有和未来的加速器在主流处理器中成为可能。特别关注促进细粒度使用的低开销解决方案，这些解决方案允许使用和共享加速器，同时保护安全和隐私。该项目依赖于对加速器的硬件和软件接口的共同设计，以便能够通过一致的共享内存通信从用户模式代码直接、低延迟地访问。对加速器的更高效的访问使摩尔定律能够在不相应增加功率的情况下带来持续的性能提升。这可以降低计算的整体功耗，减少温室气体排放，并在任何规模上提供更大的计算能力，无论是在移动设备还是超级计算机中。PI继续通过学生、课程、讲座、工业关联、商业影响和基础设施共享来广泛影响最先进的计算机系统。

Frequent doubling of computer system performance has facilitated innovations in science, education, government, and commerce. The foundations of these improvements, Moore's Law improving density and Dennard scaling reducing transistor power, have enabled chips with exponentially more transistors at roughly fixed power and cost. However, upcoming physical limits threaten to force a choice between either chip power and cost escalation or stagnant chip performance where lowest cost wins.This project seeks a new middle approach, called dark silicon, that keeps the number of powered-on transistors roughly constant even as the number of transistors per chip grows. Rather than add general-purpose cores, future mainstream chips will deploy many accelerators to improve performance or power by 10x-100x. Such chips will turn on one or more accelerators when needed to help power and/or performance and leave most others off. Accelerators for system-on-chip (SoC) have already been designed, for such uses as encryption, (de)compression, network protocols, XML, and graphics. This research seeks to invent and refine architecture and system support to make existing and future accelerators possible in mainstream processors. Specific focus is given to low-overhead solutions facilitating fine-grain use that allow accelerators to be used and shared while protecting security and privacy. The project relies on co-design of hardware and software interfaces to accelerators in order to enable direct, low-latency access from user-mode code via coherent shared-memory communication.More efficient access to accelerators enables Moore's law to bring continued performance increases without corresponding increases in power. This can reduce the overall power consumption of computing and reduce greenhouse gas production, as well as provide greater computation power at any scale, whether in a mobile device or a supercomputer. The PIs continue to impact broadly the state-of-the-art of computer systems through students, courses, talks, industrial affiliates, commercial influence, and sharing of infrastructure.