CSR: Small: Towards a Co-Designed Latency-Centric On-Chip Communication Substrate

随着高性能处理器芯片不断集成更多的组件，如通用核心或特殊加速器单元，对更高性能和更好能效的通信基板的需求明显增加。不幸的是，持续的器件扩展加剧了片上金属线面临的基本挑战，例如增加了损耗、延迟、色散和串扰。随着技术的进步，替代传统通信方案显然势在必行。现有的片外互连解决方案，如分组交换网络和光纤，正在找到进入片上环境的途径。然而，这些解决方案在片外环境中的一组不同的约束和目标下发展，并且不能自动适用于片上环境。例如，分组交换互连提供可扩展的吞吐量，但通信延迟和能源成本很高。该项目采用多学科方法，基于新颖的宽带、基于脉冲的通信机制和与电路相匹配的体系结构支持，探索以延迟为中心的通信基板的设计。早期证据表明，这有很大的潜在好处，包括在吞吐量足够高的情况下具有卓越的延迟，以及极低的能源成本。该项目的成功可能对未来的微处理器和其他复杂的片上系统设计方法产生至关重要的影响。该项目还有助于培养学生在数字和模拟电路与建筑设计的交叉点。这是科技行业未来的一个重要领域。

As high-performance processor chips continue to integrate more components such as general-purpose cores or special accelerator units, increasing demand for a communication substrate with higher performance and better energy efficiency is evident. Unfortunately, continued device scaling has exacerbated the fundamental challenges facing on-chip metal wires, such as increased loss, delay, dispersion, and cross-talk. Alternatives to the conventional communication schemes are clearly imperative as technology progresses. Existing solutions for off-chip interconnection such as packet-switching networks and optics are finding their way into the on-chip environment. However, these solutions evolve under a different set of constraints and goals in the off-chip environment and are not automatically suitable in the on-chip environment. For instance, a packet-switched interconnect provides scalable throughput, but at significant communication latency and energy costs.This project takes a multidisciplinary approach and explores the design of latency-centric communication substrates based on novel wide-band, pulse-based communication mechanisms and architectural support that dovetails the circuits. Early evidence suggests there are significant potential benefits, including superior latency at sufficiently high throughput and extremely low energy costs. The success of this project can critically impact future microprocessor and other complex system-on-chip design methodology. This project also contributes to the training of students at the intersection of digital and analog circuit and architecture design ? an important area for the future of the technology industry.