IRES: International Research Experience for Students on Design Automation of Three-Dimensional Integrated Circuits

非技术摘要：该项目将使美国学生能够与台湾国立清华大学（NTHU）的导师合作，对三维集成电路（3D IC）的设计自动化进行高质量的研究。这些经历使美国学生在职业生涯的关键早期阶段接触到国际研究界。透过参与此计划，美国学生将在3D IC的研究、国际半导体的前景、台湾的文化，以及在国际环境中的表演和合作方面获得丰富的经验。经验也将通过个人社交媒体的参与，基于Web 2.0的论坛，精心整合的活动，如本科生的研究，以及当地学校的外展活动，分享给更广泛的社区。特别是，该项目将专注于少数民族和代表性不足的群体的职业发展。技术摘要：该IRES项目为美国学生提供与世界上最大的半导体产业所在地台湾新竹的三维集成电路（3D IC）设计自动化相关的宝贵研究经验。该项目每年将在全国范围内选择五（5）名研究生和两（2）名本科生，并支持他们在十二（12）周内访问国立清华大学（NTHU）计算机科学系。他们将由清华大学的教授指导。主要研究目标是解决3D IC中的基本问题，并弥合先进的3D制造工艺与使用这些技术的设计师之间的差距。摩尔定律指出，集成电路上的晶体管密度大约每两年翻一番。然而，由于与半导体缩放相关联的高成本，这种趋势变得越来越难以保持。因此，半导体工业已经开始寻找提供超越器件缩放限制的路径的替代技术。在所有可能的替代方案中，三维集成电路（3D IC）通常被认为是最有前途的一个，至少在未来十年内，因为它与当前技术完全兼容。它不是使晶体管更小，而是垂直堆叠多个芯片，以实现更高的集成密度、更短的线长、更小的占地面积、更高的速度和更低的功耗。因此，3D IC已成为近年来学术研究和工业实践中的一个非常热门的话题。学生将从事与3D IC的产量提高和两种有前途的3D技术-基于插入器的3D IC和单片3D IC的新颖设计流程相关的项目。该研究可以显著提高3D IC的成品率，而不涉及面积代价。预计清华大学IRES项目的突破将对3D IC产业产生直接影响。

Non-Technical Abstract: This project will enable U.S. students to conduct high-quality research on design automation of three dimensional integrated circuits (3D ICs), in collaboration with their faculty mentors at National Tsing Hua University (NTHU) in Taiwan. Such experiences expose U.S. students to the international research community at a critical early stage in their careers. It is expected that through participating in this project, U.S. students will gain extensive experience on the research of 3D ICs, on the international semiconductor prospects, on the culture in Taiwan, and on performing and collaborating in an international environment in general. The experience will also be shared to the broader community through the involvement of personal social media, Web 2.0 based forum, carefully integrated activities such as research for undergraduate students, as well as outreach events for local schools. In particular, this project will have a dedicated focus on the career development of minorities and underrepresented groups.Technical Abstract: This IRES project provides U.S. students with valuable research experience related to the design automation of three-dimensional integrated circuits (3D ICs) in Hsin-Chu, Taiwan, where the world's largest semiconductor industry is located. The project will select five (5) graduate students and two (2) undergraduate students nation-wide each year and support them to visit the Computer Science Department at National Tsing Hua University (NTHU) over a period of twelve (12) weeks. They will be mentored by the professors at NTHU. The primary research objective is to address fundamental issues in 3D ICs and to bridge the gap between advanced 3D fabrication processes and the designers using these technologies. The Moore's Law states that the transistor density on integrated circuits doubles approximately every two years. However, this trend is becoming increasingly difficult to keep due to the high cost associated with semiconductor scaling. Accordingly, the semiconductor industry has started to look for alternative technologies that offer a path beyond the limits of device scaling. Among all the possible alternatives, the three-dimensional integrated circuit (3D IC) is generally considered to be the most promising one, at least in the next decade, for its full compatibility with current technologies. Instead of making transistors smaller, it stacks multiple chips vertically for higher integration density, shorter wirelength, smaller footprint, higher speed, and lower power consumption. As such, 3D IC has become a very hot topic in academic research and industry practice in recent years. The students will work on projects related to the yield enhancement of 3D ICs and the novel design flows for two promising 3D technologies - interposer-based 3D ICs and monolithic 3D ICs. The research can significantly increase the yield of 3D ICs without involving area penalty. It is anticipated that the breakthroughs from this IRES project at NTHU can have a direct impact on the 3D IC industry.