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SHF: Small: On-Die Learning: A Pathway to Post-Deployment Robustness and Trustworthiness of Analog/RF ICs

SHF: Small: On-Die Learning: A Pathway to Post-Deployment Robustness and Trustworthiness of Analog/RF ICs
SHF:小型:片上学习:实现模拟/射频 IC 部署后稳健性和可信度的途径
批准号:
1527460
负责人:
Yiorgos Makris
金额:
$35.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2015
资助国家:
美国
项目状态:
已结题
起止时间:
2015-07-15 至 2019-06-30

项目摘要

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中文摘要
翻译
为了实现可靠的计算和促进技术的可信度,该项目旨在促进稳健和可信集成电路(ic)的经济高效实现,特别强调在模拟/射频领域。虽然制造的IC在部署之前要经过广泛的审查,以剔除有缺陷或可疑的部件,但硅老化和不利的操作或环境条件等各种原因可能导致先前健康的模拟/RF IC的性能无法达到其设计规格。类似地,隐藏功能的现场激活触发器可能导致先前可信的模拟/RF IC显示恶意功能。由于无线通信、传感器应用和物联网(IoT)的快速增长,模拟/射频ic现在在大多数电子系统中普遍存在,因此为它们配备鲁棒性和可信度评估机制对于部署它们的应用来说至关重要。拟议的研究还将辅以教育和外展活动,包括开发一个新的教育模块,为研究生和本科生提供研究电气工程、计算机科学和应用数学等跨学科项目的机会,并让当地社区成员接触自测、自我校准、通过德克萨斯大学达拉斯分校德州模拟卓越中心(TxACE)组织的教程和研讨会,对模拟/射频ic进行部署后信任评估。更具体地说,该项目旨在通过集成基于机器学习的模内监测和校准功能,提高模拟/RF ic的部署后稳健性和可靠性。该项目的重点是成本效益的集成片上学习能力,可以训练:(i)确定模拟/射频IC是否符合其规格,(ii)校准其性能,和/或(iii)检测潜在恶意电路的激活,基于片上传感器的简单测量。通过设计、制造和表征两种不同的模拟/射频ic,该项目旨在证明可以集成芯片上的智能,以提供部署后的自测、校准和信任评估功能。
英文摘要
Towards enabling reliable computing and promoting technology trustworthiness, this project seeks to facilitate cost-effective realization of robust and trusted integrated circuits (ICs), with particular emphasis in the analog/RF domain. While manufactured ICs are subjected to extensive scrutiny in order to weed out defective or suspicious parts prior to their deployment, a variety of reasons such as silicon aging and adverse operational or environmental conditions might cause the performances of a previously healthy analog/RF IC to fail its design specifications. Similarly, field-activated triggers of hidden capabilities might cause a previously trusted analog/RF IC to exhibit malicious functionality. With analog/RF ICs now prevalent in most electronic systems, due to the rapid growth of wireless communications, sensor applications, and the Internet of Things (IoT), equipping them with robustness and trustworthiness evaluation mechanisms becomes paramount to the applications wherein they are deployed. The proposed research is complemented by educational and outreach activities, including development of a new educational module, by providing opportunities for graduate and undergraduate research in interdisciplinary projects spanning Electrical Engineering, Computer Science and Applied Mathematics, as well as exposure of local community members to the topics of self-test, self-calibration, and post-deployment trust evaluation of analog/RF ICs through tutorials and seminars organized by the Texas Analog Center of Excellence (TxACE) at the University of Texas at Dallas. More specifically, this project seeks to enhance post-deployment robustness and trustworthiness of analog/RF ICs by integrating machine learning-based on-die monitoring and calibration capabilities. The key focus of this project is the cost-effective integration of on-die learning capabilities, which can be trained to (i) determine whether an analog/RF IC complies with its specifications, (ii) calibrate its performances, and/or (iii) detect the activation of potentially malicious circuitry, based on simple measurements from on-chip sensors. Through design, fabrication and characterization of two different analog/RF ICs, this project seeks to demonstrate that on-die intelligence can be integrated to provide post-deployment self-test, calibration and trust evaluation capabilities.
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