I-Corps: Sygnal: Compact, Low Power, High Performance Digital Circuits using Threshold Logic

由晶体管组成的数字电路是计算机芯片中的组件，这些芯片运行着当今使用的几乎所有计算设备(例如服务器、台式机、笔记本电脑、平板电脑、智能手机和可穿戴设备)。虽然我们可以在一平方厘米内容纳超过10亿个晶体管，但要充分利用它们变得越来越困难，因为它们消耗了太多能量。如今，降低能耗的方法总是以降低速度为代价，这反过来又降低了它们执行更具挑战性的任务的能力(例如通过智能手机进行人脸识别)。该团队开发了一种设计数字电路的新方法，这种方法在不牺牲性能的情况下消耗更少的能量(从20%到40%)，并且可以制造得更小。因此，拟议的技术将降低数字系统的能耗，延长电池寿命和/或提高笔记本电脑、平板电脑、智能手机和其他电池供电系统的能力。拟议电路的另一个显著优势是，它们可以使用与当今公司使用的相同商业工具和相同的半导体制造工艺进行设计，从而使行业能够轻松快速地采用。包括智能手机和可穿戴设备在内的一大类产品都需要高性能、低功耗的数字电路。当前的半导体解决方案依靠时钟和电源管理来降低能源消耗，但每操作能耗的降低依赖于回报递减的技术扩展。这个i-Corps团队开发了一种数字电路实现技术，该技术在不影响速度的情况下减少了焦耳/运算和面积，并基于三个基本的CMOS逻辑设计进步，所有这些都受到专利保护。(1)坚固、低功耗阈值逻辑电路设计(TLG)，将一大组复杂功能和触发器结合到单个单元中。(2)TLGs标准单元库，与商业综合、优化和物理设计工具使用的常规单元库完美兼容。(3)使用单元和常规逻辑单元优化给定逻辑网络的软件，从而产生混合设计。所有这三个部分--电路架构、单元库和设计软件--都旨在确保与现有商业设计流程100%兼容，允许使用商业工具进行全自动综合、优化和布局。

Digital circuits made up of transistors are the components inside computer chips that operate nearly all the computing devices (e.g. servers, desktops, laptops, tablets, smartphones, and wearables) in use today. Although we can pack more than a billion transistors in one square centimeter, it is becoming increasingly difficult to make full use of them because they consume too much energy. Today, methods to lower the energy consumption always come with a price?reduced speed, which in turn makes them less capable to perform more challenging tasks (e.g. face recognition by smartphone). This team has developed a new way to design digital circuits that consume much less energy (ranging from 20% to 40%) without sacrificing performance and can be made smaller. Thus the proposed technology will reduce energy consumption of digital systems, extend the battery life and/or improve the capabilities of laptops, tablets, smartphones and other battery powered systems. Another significant advantage of the proposed circuits is that they can be designed with the same commercial tools and the same semiconductor fabrication processes that are used by companies today, enabling easy and rapid adoption by industry. High performance, low-­‐power digital circuits are required for a large class of products including smartphones and wearables. Current semiconductor solutions rely on clock and power management to reduce energy consumption, but reduction in energy per operation has relied on technology scaling with diminishing returns. This I-Corps team has developed a digital circuit implementation technology, that reduces joules/operation and area without compromising speed, and is based on three fundamental advances in CMOS logic design, all patent protected. (1) Robust, low power threshold logic circuit design, (TLG), that combines the functionality of a large set of complex functions, and a flip-­‐flop into a single cell. (2) A standard cell library of TLGs, which is perfectly compatible with conventional cell libraries used by commercial synthesis, optimization and physical design tools. (3) Software that optimizes a given logic network using cells and conventional logic cells, resulting in a hybrid design. All three - the circuit architecture, cell library and design software - were designed to ensure 100% compatibility with existing commercial design flows, allowing fully automated synthesis, optimization and layout using commercial tools.