An Undergraduate Digital Systems Laboratory With Emphasis OnVLSI
An Undergraduate Digital Systems Laboratory With Emphasis OnVLSI
批准号:
9351291
负责人:
Sarma Vrudhula
金额:
$4.47万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
1993
资助国家:
美国
项目状态:
已结题
起止时间:
1993-09-01 至 1996-02-29
中文摘要
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英文摘要
9351291 Vrudhula The aim of this project is to establish an undergraduate digital systems design laboratory with emphasis on VLSI. This laboratory is part of a new two- course sequence offered to seniors in computer engineering. The primary objectives of this project are: (1) to expose the students to all aspects of systems design, starting from the behavioral level down to the layout level; and (2) to teach the fundamental engineering discipline involved in evaluation, testing and redesign. These primary objectives are being achieved by addressing the following important aspects of systems design: (1) use of multiple levels of abstraction; (2) methods of evaluating a design in terms of performance, area, design time and cost at each level; (3) examining tradeoffs among the possible choices that are available at each level; (4) understanding the limits of fabrication technology, causes and effects of failures and fault models; and (5) understanding that design and test cannot be separate activities by introducing design for testability. The purpose of the laboratory is to provide hands on experience through the use of the latest CAD tools and a computing environment that reflects the state-of-the-art in industry. The tools eliminate much of the mundane aspects of the design and allow the students to focus on the important high level design issues. Theoretical knowledge and practical design experience are carefully balanced through a set of realistic design projects that involve the students in all aspects of systems design. In addition, the laboratory provides for rapid prototyping of the designs through the use of Field Programmable Gate Arrays. This allows students to build, exercise, and re-evaluate designs. ***
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I/UCRC FRP: Collaborative Research: Testability and timing analysis in nanoscale designs in the presence of process variations
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I/UCRC: Consortium for Embedded Systems - Phase II
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I/UCRC: Collaborative Research: Synthesis and Design of Robust Threshold Logic Circuits
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批准号:1230401
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资助金额:$10.0万
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PFI-BIC: Novel Circuit Architectures and Design Methodologies for Low Power Digital Systems
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批准号:1237856
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资助金额:$60.0万
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财政年份:2012
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批准号:0905035
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财政年份:2009
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依托单位:
Collaborative Research: Consortium for Embedded Systems
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批准号:0856090
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财政年份:2009
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依托单位:
Collaborative Research: Synthesis, Verification and Testing for Nano-CMOS and Beyond using Threshold Logic
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批准号:0702831
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资助金额:$20.0万
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财政年份:2007
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依托单位:
Collaborative Research: Consortium for Embedded Systems
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资助金额:$1.0万
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财政年份:2007
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依托单位:
A Development System for Rapid Prototyping of Dynamically Reconfigurable Mixed-Signal Low-Power Systems
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批准号:9815615
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资助金额:$25.0万
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财政年份:1998
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Center for Low Power Electronics
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批准号:9523338
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财政年份:1996
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RIA: Stochastic Models in Partitioning for Testability of Digital Circuits
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批准号:9296277
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资助金额:$2.48万
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财政年份:1992
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依托单位:
RIA: Stochastic Models in Partitioning for Testability of Digital Circuits
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资助金额:$3.52万
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财政年份:1991
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负责人:Sarma Vrudhula
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依托单位:
国内基金
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