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I/UCRC: Collaborative Research: Synthesis and Design of Robust Threshold Logic Circuits

I/UCRC: Collaborative Research: Synthesis and Design of Robust Threshold Logic Circuits
I/UCRC:合作研究:鲁棒阈值逻辑电路的综合与设计
批准号:
1230401
负责人:
Sarma Vrudhula
金额:
$10.0万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2012
资助国家:
美国
项目状态:
已结题
起止时间:
2012-08-01 至 2015-07-31

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中文摘要
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英文摘要
The proposed research targets the investigation of techniques that enable using Threshold Logic (TL) circuits to implement Systems on a Chip (SoC) devices for embedded systems. The project proposes to take a unified approach to simultaneously address TL circuit synthesis and TL gate design. The work also plans to investigate TL based on nanodevices and the extension of TL to mixed signal circuits such as Analog to Digital Converters (ADCs). This work also represents the first collaborative project between these two sites of the center.The outcomes of the proposed work have the potential to help the semiconductor industry produce more reliable and affordable microprocessors and SoC implementations. The work is supported by the Industry Advisory Board as well as individual industry members of the center and has the potential to extend the centers portfolio through collaboration of two of its sites. The PIs research will impact diverse undergraduate and graduate students as well as be used as a tool to recruit students to the field.
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