Integration of III-Vs on silicon: from the micron to the nanometre regime

几十年来，由于对更高速度和存储容量的需求不断增长，硅CMOS技术的复杂性不断增加。在很大程度上，这些需求可以通过小型化的惊人进步来满足，这种进步在一代人之前是不可想象的。然而，最近，鉴于对功耗、数据传输和迄今为止无法进入的领域的新应用的关注，越来越迫切需要额外的功能。新的功能必然意味着硅技术将被扩展到其他半导体材料中，这些材料不仅具有硅的光学和电学特性。由于其优异的光学和电学性能，砷化镓是最重要的III-V半导体之一。本项目的目标是探索基于砷化镓的金属有机化学va-pour沉积（MOCVD）在图案化Si和Ge/Si衬底上的半导体堆的外延生长。这将是实现基本光学器件子组件（如波导、光栅耦合器和激光器）在Si CMOS平台上的单片集成的第一步。这里的挑战是克服晶格参数和热性质的巨大不匹配所引起的晶体缺陷问题，这是迄今为止阻碍GaAs-on-Si技术应用的问题。在我们的方法中，外延将在具有大长宽比和横向尺寸范围从几微米到几十纳米的特殊设计的衬底图案上进行。这将允许探索位错结构的演变，反相域作为图案尺寸的函数，它定义了从本质上刚性到柔性衬底制度的转变。衬底图案将包括蚀刻Si特征的侧壁钝化，允许使用选择性外延技术直接在Si或选择性生长的Ge缓冲结构上精确定位化合物半导体堆栈。图案几何和缺陷结构之间的关系将通过结构，分析和光学技术，如透射电子显微镜（TEM），原子探针测量，高分辨率x射线衍射（HR-XRD），包括同步加速器纳米衍射，微拉曼和光致发光光谱来研究。我们打算设计特殊的测试结构，以证明外延III-V材料在不匹配的Si衬底上的器件质量。这些将允许通过光泵浦来评估激光作用，作为在cmos处理的硅片上制造单片集成激光器的初步步骤。

During decades the complexity of silicon CMOS technology has continuously been increasing, driven by ever rising demands for higher speed and storage capacity. For the most part, these demands could be met by breath taking advances in miniaturization to a degree unthinkable a generation ago. Lately, however, in view of concerns about power consumption, data transmission, and new applications in hitherto inaccessible fields, additional functionalities are becoming more and more urgently needed. New functionalities necessarily imply silicon technology to be extended to other semiconducting materials with optical and electrical properties beyond those of Si alone.In view of its excellent optical and electrical properties GaAs is one of the most important III-V semi-conductors. It is the goal of this project to explore the epitaxial growth by metal organic chemical va-pour deposition (MOCVD) of semiconductor stacks based on GaAs on patterned Si and Ge/Si sub-strates. This will be the first necessary step towards the monolithic integration of elementary optical-device subcomponents, such as waveguides, grating couplers and lasers on a Si CMOS platform. The challenge here is to overcome the problem of crystal defects arising from the large mismatch of lattice parameters and thermal properties which has so far hindered GaAs-on-Si technology to be applied. In our approach the epitaxy will be carried out on specially designed substrate patterns with large aspect ratios and lateral dimensions ranging from several microns to tens of nanometers. This will permit to explore the evolution of dislocation structures anti-phase domains as a function of the pattern size, which defines the transition from an essentially rigid to a compliant substrate regime. The substrate patterning will include sidewall passivation of the etched Si features, permitting the use of selective epitaxy techniques for precise positioning of the compound semiconductor stacks either directly on Si or on selectively grown Ge buffer structures.The relation between pattern geometry and defect structure will be studied by structural, analytical and optical techniques, such as transmission electron microscopy (TEM), atom probe measurements, high-resolution X-ray diffraction (HR-XRD) including synchrotron nanodiffraction, micro-Raman and photoluminescence spectroscopy. We intend to design special test structures in order to prove the device quality of epitaxial III-V material on mismatched Si substrates. These will permit to assess lasing action by optical pumping as a preliminary step towards the fabrication of monolithically integrated lasers on CMOS-processed Si-wafers.