Charge compensation in 4H silicon carbide - Simulation, modelling and experimental verification

对于硅中的功率半导体器件，应用在相邻的p和n掺杂半导体区之间具有电荷补偿的器件图案。这些模式可以实现单极器件，在阻断工作时具有阻断电压，在正向导通时具有较低的器件电阻。首先，使用电荷补偿图案在碳化硅中制造的半导体器件遵循的设计规则要么是基于良好控制的硅技术的理论计算，要么是使用非经验的试错法。本方案旨在为实现高补偿度的电荷补偿模式提供基础，并对其电学特性和物理效应的影响进行系统的研究。重点研究了掺杂不完全激活和电离以及表面钝化对器件的补偿度、击穿电压和漂移电阻的影响。这允许改进现有的模拟模型以获得更高的精度，并推导出这些不是(如在硅中)基于完全受控半导体工艺的电荷补偿图案的解析描述。以基于硅中的电荷补偿图案的解析建模为起点，并考虑掺杂的不完全激活，将对碳化硅中的横向电荷补偿图案进行建模和二维TCAD模拟。利用与模拟相对应的横向测试图形的制作及其电学特性来增加基于测量结果的基础模型的建模精度和可扩展性。然后，这些模型被用来将结果传输到碳化硅中的横向功率晶体管并进行验证。此外，还将进行动态切换实验，以评估未完全电离等物理效应对电荷补偿模式中的电学特性(例如雪崩击穿)的影响。研究结果将为4H-SIC横向和垂直功率半导体器件的制作提供精确的电荷补偿物理模型，从而简化横向和垂直功率半导体器件的制作。

For power semiconductor devices in silicon, device patterns with charge compensation between adjacent p- and n-doped semiconductor regions are applied. These patterns enable the realization of unipolar devices with blocking voltage under blocking operation and low device resistance in forward conduction. First semiconductor devices fabricated in silicon carbide employing charge compensation patterns are following design rules that are either based on theoretical calculations which are based on the well-controlled silicon technology or using non-empiric trial-and-error methods. Hereby, a suitable design of the compensation patterns is achieved either with a poor degree of compensation at all or only by repetitive process variations.This proposal is aiming to provide the foundation for the realization of charge compensation patterns with a high degree of compensation, and to conduct a systematic investigation regarding their electrical characteristics and the impact of physical effects. In particular, the impact of incomplete activation and ionization of dopants in SiC as well as the surface passivation on the degree of compensation, the breakdown voltage and the drift resistance is investigated. This allows for an improvement of existing simulation models for higher accuracy and the derivation of an analytical description of these charge compensation patterns that are not (as in silicon) based on a fully controlled semiconductor technology.With the aid of analytical modelling based on charge compensation patterns in silicon as a starting point and considering incomplete activation of dopants, both modelling and two dimensional TCAD simulations for lateral charge compensation patterns in silicon carbide will be implemented. The fabrication of lateral test patterns corresponding to the simulations and their electric characterization are used to increase the modelling accuracy and extension of the underlying models based on the measurement results. These models are then used to transfer and verify the results to lateral power transistors in SiC. Additionally, dynamic switching experiments will be carried out to evaluate the impact of physical effects like incomplete ionisation on electrical properties (e.g. avalanche breakdown) in charge compensation patterns. Finally, vertical charge compensation patterns will be realized to validate the methodology of this scientific approach as a whole.The results from this research project will simplify the fabrication of lateral and vertical power semiconductor devices on 4H-SiC by provision of accurate physical models for charge compensation.