Massively Parallel Networks in 3D-Stacked Silicon Wafers

随着VLSI技术的不断进步，具有数十到数百个处理元件的多处理器系统预计将在未来十年与今天的超级计算机相媲美。由几十到一百万个处理元素组成的系统确实在文献中有过描述。这种大规模系统的发展将使多媒体、计算机视觉和物理现象建模等许多应用在桌面工作站上变得可行。然而，设计大规模多处理器系统的一个主要问题是如何构建灵活的互连网络以提供高效的处理器间通信。本研究开发了一个分层结构的互连网络，“Tori连接网格”（TESH），它允许利用计算局部性以及模块化的未来扩展。此外，网络减少了布线，每个处理器只有几个端口，这些特性对于大规模计算系统的经济高效实现至关重要。此外，它有一个规则的结构，使得节点寻址和消息路由相当简单。该网络似乎还允许3d堆叠实现。在某种程度上，这是由于与几乎所有已知的多计算机网络相比，所需的垂直电线数量要少得多。众所周知，并行化问题通常是特定于应用程序和系统体系结构的。因此，一些应用，如排序、合并、FFT和卷积，已经被映射到网络作为范例。

With the continuing advances in VLSI technology, multiprocessor systems with tens to hundreds of processing elements are expected to rival today's supercomputers in the next decade. Systems consisting of a few tens to a million processing elements have indeed been described in the literature. The development of such large scale systems will make numerous applications such as multi-media, computer vision, and modeling of physical phenomena to be feasible on desk-top workstations. However, a major issue in designing large scale multiprocessor systems is the construction of a flexible interconnection network to provide efficient inter-processor communication.This research develops a hierarchically structured interconnection network, 'Tori connected mESHes' (TESH), which allows exploitation of computational locality as well as modular future expansion. Also, the network has reduced wiring and only a few ports per processor, features that are essential in cost-effective implementation of large scale computing systems. Further, it has a regular structure which makes addressing of nodes and message routing rather straightforward. The network also appears to permit 3-D stacked implementation. In part, this is due to the far fewer number of vertical wires needed than almost all known multi-computer networks. As is well known, parallelizing a problem is usually application-specific and system architecture dependent. Therefore, several applications such as sorting, merging, FFT, and convolution, have been mapped to the network as paradigms in.