Real-time Numerical Optimization in Reconfigurable Hardware with Application to Model-Predictive Control

该建议涉及迭代数值算法的硬件加速，重点是模型预测控制的实现。这种模型预测控制器通常需要在每个采样周期求解二次规划问题。二次规划问题的解决方案通常需要几个多维牛顿优化，每个优化都需要求解许多线性方程组。因此，所吸取的教训将适用于广泛的一类数值算法中产生的实际问题内和超越Control.The主要的冒险功能的方法从数字电子学的角度来看，是潜在的使用控制和系统理论通知的中心设计问题之一，在定制的可重构计算：有效的硅利用率通过适当的有限精度的数字表示。在顺序（单核）计算机体系结构中，数值精度的问题，总的来说，通过引入面积昂贵的高精度IEEE兼容的算术单元得到了回答。在现代计算系统中，无论是基于FPGA的还是众核的，人们的注意力都转向如何最有效地利用可用于计算的硅，在这种情况下，数值精度要求的问题再次出现。从最终用户的角度来看，该方法的主要冒险特征是利用可重新配置的硬件设备，即现场可编程门阵列（FPGA），以实现以高采样率操作的模型预测控制器，从而允许MPC用于迄今为止计算负载被认为太大的应用领域，例如航天器，飞机，无人驾驶自动驾驶车辆，汽车控制系统和燃气轮机。从理论的角度来看，在控制的主要冒险是在开发新的配方，explicitly利用并行计算architecturs.The开发的方法来解决这个问题将涉及高度新颖的研究领域，从控制理论的思想应用到硬件开发，以及硬件实现方法的应用控制系统设计。特别是，该提案是第一个研究FPGA上的大规模并行实时数值优化的提案，第一个应用控制理论技术来确定定制硬件设计中的适当数字系统的提案，以及第一个研究闭环行为环境中电路并行性和数值精度之间的权衡的提案。这个建议直接福尔斯落在EPSRC最近发布的微电子学大挑战3 -摩尔更少的范围内。

This proposal is concerned with the hardware acceleration of iterative numerical algorithms, with a focus on model predictive control implementations. Such model predictive controllers typically require the solution of a quadratic progamming problem every sample period. The solution of the quadratic programming problem typically requires several multidimensional Newton optimizations, each of which requires the solution of many systems of linear equations. Thus the lessons learned will be applicable to a wide class of numerical algorithms arising in practical problems within and beyond Control.The main adventurous feature of the approach from the digital electronics perspective is the potential to use Control and Systems theory to inform one of the central design problems in custom reconfigurable computing: efficient silicon utilization through appropriate finite precision number representation. In sequential (single core) computer architecture, questions of numerical precision have, by and large, been answered through the introduction of area costly high-precision IEEE compliant arithmetic units. In modern computing systems, whether FPGA-based or manycore, attention is now turning to how to make the most effective use of the silicon available for computation and, in this context, questions of numerical accuracy requirements are arising once more.The proposed approach forms a radical departure from standard industrial and academic practice in both model predictive control (MPC) and digital electronics. The main adventurous feature of the approach from the end-user perspective is the utilization of reconfigurable hardware devices, namely Field-Programmable Gate Arrays (FPGAs), to implement model predictive controllers operating at high sample rates, allowing MPC to be utilized in application areas where the computational load has been considered too great until now, such as spacecraft, aeroplanes, uninhabited autonomous vehicles, automobile control systems and gas turbines. From the theoretical perspective, the main adventure in Control is in the development of novel formulations that explcitly take advantage of parallel computational architectures.The development of a methodology to tackle this problem will involve highly novel research areas resulting from the application of control theoretic ideas to hardware development, as well as the application of hardware implementation methodologies to control system design. In particular, this proposal is the first to investigate massively parallel real-time numerical optimization on FPGAs, the first to apply control-theoretic techniques to determine appropriate number systems in custom hardware designs, and the first to study the tradeoff between circuit parallelism and numerical accuracy within a closed-loop behavioural context.As a result, this proposal directly falls within the scope of EPSRC's recently signposted Microelectronics Grand Challenge 3 - Moore for Less.