Lithographically induced self-assembly techniques for advanced electronic device fabrication

40多年来，半导体行业在性能方面取得了稳定而巨大的增长，导致电子产品在我们的日常生活中无处不在。但是这个行业现在面临着三个关键的挑战：1)电子芯片产生的大量热量严重限制了它们继续小型化；2)追求小型化趋势的材料选择导致了材料性能的重大问题，例如脆性和散热问题；3)微处理器架构现在正朝着在一块硅片上集成几个核心的方向发展，因此，微处理器各部分之间以及微处理器与计算机其他组件之间的连接要求非常具有挑战性。这导致了新材料和创新的三维和/或光电连接的发展。在未来的5到10年里，该行业需要具有极高速度的创新低功耗器件，这些器件必须与当前的CMOS技术兼容，以充分利用当前可用的大规模制造能力。单电子晶体管很有希望解决这些问题，但它们需要高度先进的制造技术；这些技术现在受到纳米尺度的物理限制的严重挑战。自组装纳米结构，如碳纳米管，可以用于这些和其他纳米电子器件，遭受不同的问题，许多涉及到需要精确定位纳米管在电子电路，和其他有关的挑战，将制造过程从实验室到制造环境。该研究项目将探索混合方法，利用复杂的纳米光刻技术和更简单的自组装技术来生产纳米结构，如碳纳米管和金属点，并精确控制它们在设备和电路中的位置，以利用它们卓越的电气、机械和热性能，最终提高先进电子电路的性能。

The semiconductor industry has achieved a steady and tremendous growth in performance for more than 40 years, leading to the pervasiveness of electronics in our daily lives. But this industry is now facing three key challenges: 1) the tremendous amount of heat that is generated by electronic chips now sets serious limits to their continued miniaturization; 2) the choice of materials for pursuing the miniaturization trend leads to major issues with material properties, for example brittleness and heat dissipation issues; 3) the microprocessor architecture is now evolving towards the integration of several cores on a single silicon chip, thus requiring very challenging connections between segments of a microprocessor and between the microprocessors and other components of a computer. This led to the development of new materials and of innovative 3-dimensional and/or optoelectronic connections. Over the next 5 to 10 years, the industry needs innovative low power devices capable of extremely high speeds and these devices must be compatible with the current CMOS technology in order to capitalize on the massive manufacturing capacity currently available. Single electron transistors are very promising for addressing these issues, but they need highly advanced fabrication techniques for manufacturing; these techniques are now seriously challenged by physical limits at the scale of the nanometre. Self-assembled nanostructures such as carbon nanotubes that could be used in these and other nanoelectronic devices suffer from different problems, many related to the need to accurately position the nanotubes in an electronic circuit, and others related to the challenge of taking the fabrication processes out of the laboratory and into the manufacturing environment. This research program will explore hybrid approaches which leverage sophisticated nanolithography with simpler self-assembly techniques for producing nanostructures such as carbon nanotubes and metallic dots and accurately controlling their location in devices and circuits, in order to exploit their exceptional electrical, mechanical and thermal properties, and eventually to increase the performance of advanced electronic circuits.