Lithographically induced self-assembly techniques for advanced electronic device fabrication

半导体行业在40多年的时间里实现了业绩的稳步和巨大增长，导致电子产品在我们的日常生活中无处不在。但该行业现在面临三个关键挑战：1)电子芯片产生的巨大热量现在严重限制了其继续小型化；2)为追求小型化趋势而选择的材料导致了材料性能的重大问题，例如脆性和散热问题；3)微处理器体系结构现在正朝着在单个硅芯片上集成多个核心的方向发展，因此需要在微处理器的各个部分之间以及在微处理器和计算机的其他组件之间进行非常具有挑战性的连接。这导致了新材料和创新的三维和/或光电连接的发展。在接下来的5到10年里，该行业需要能够极高速度的创新低功耗设备，这些设备必须与当前的cmos技术兼容，以便充分利用现有的大规模制造能力。单电子晶体管在解决这些问题方面非常有希望，但它们需要非常先进的制造技术来制造；这些技术现在受到纳米级物理限制的严重挑战。可用于上述和其他纳米电子器件的自组装纳米结构，如碳纳米管，遇到了不同的问题，许多问题与在电子电路中准确定位纳米管的需要有关，另一些问题与将制造过程从实验室带到制造环境中的挑战有关。这项研究计划将探索混合方法，利用复杂的纳米光刻和更简单的自组装技术来制造纳米结构，如碳纳米管和金属点，并精确控制它们在器件和电路中的位置，以利用它们特殊的电、机械和热性能，并最终提高先进电子电路的性能。

The semiconductor industry has achieved a steady and tremendous growth in performance for more than 40 years, leading to the pervasiveness of electronics in our daily lives. But this industry is now facing three key challenges: 1) the tremendous amount of heat that is generated by electronic chips now sets serious limits to their continued miniaturization; 2) the choice of materials for pursuing the miniaturization trend leads to major issues with material properties, for example brittleness and heat dissipation issues; 3) the microprocessor architecture is now evolving towards the integration of several cores on a single silicon chip, thus requiring very challenging connections between segments of a microprocessor and between the microprocessors and other components of a computer. This led to the development of new materials and of innovative 3-dimensional and/or optoelectronic connections. Over the next 5 to 10 years, the industry needs innovative low power devices capable of extremely high speeds and these devices must be compatible with the current CMOS technology in order to capitalize on the massive manufacturing capacity currently available. Single electron transistors are very promising for addressing these issues, but they need highly advanced fabrication techniques for manufacturing; these techniques are now seriously challenged by physical limits at the scale of the nanometre. Self-assembled nanostructures such as carbon nanotubes that could be used in these and other nanoelectronic devices suffer from different problems, many related to the need to accurately position the nanotubes in an electronic circuit, and others related to the challenge of taking the fabrication processes out of the laboratory and into the manufacturing environment. This research program will explore hybrid approaches which leverage sophisticated nanolithography with simpler self-assembly techniques for producing nanostructures such as carbon nanotubes and metallic dots and accurately controlling their location in devices and circuits, in order to exploit their exceptional electrical, mechanical and thermal properties, and eventually to increase the performance of advanced electronic circuits.