3-Dimensionally Integrated Nanophotonic Circuits on Si for Terahertz-Speed Chip-Level optical

目前，超过50-80%的微处理器功率由电气互连消耗，因此，数据中心使用全球电力的近2%。因此，对于芯片内和芯片间连接，用光学对应物取代电互连具有极大的兴趣，这可以提供几个直接的优点：带宽，超低功耗，降低串扰，以及最小化散热问题。在这个项目中，作者提出在世界上首次开发由直接调制的量子点管激光器，量子点管光电探测器和Si平台上的Si波导组成的三维集成纳米光子电路，可以以太赫兹速度直接实现芯片到网络的连接。作者最近开发了自组织量子点管纳米级激光器，并进一步证明了这种纳米级激光器可以单片集成在Si平台上，而不会降低任何性能。在这个项目中，超低功率，超高速1.55微米量子点管激光器，激光器阵列和光电探测器将在Si上制造。这种纳米级器件也将被设计为频率梳发生器，它可以产生高达40个波长，模式间隔为1 - 3 nm。它们的应用在并行光数据链，芯片级波分复用，和传感器将进行评估。通过这些积极的研究，该项目旨在解决在CMOS芯片上实现超高速，超低功耗光子功能的一些重大挑战，从而为新兴的芯片级光通信提供可行的方法。

At the present time, more than 50-80% of the microprocessor power is consumed by the electrical interconnect, and, as such, data centers utilize nearly 2% of the global electricity. It is therefore of immense interest to replace electrical interconnects with optical counterparts for both intra- and inter-chip connections, which could provide several immediate advantages: ultrahigh bandwidth, ultralow-power consumption, reduced crosstalk, and minimization of heat-dissipation problems. In this project, the authors propose to develop, for the first time in the world, 3-dimensionally integrated nanophotonic circuits consisting of directly modulated quantum dot tube lasers, quantum dot tube photodetectors, and Si waveguides on a Si-platform, that can lead to direct chip-to-network connection at terahertz speed. The authors have recently developed self-organized quantum dot tube nanoscale lasers and further demonstrated that such nanoscale lasers can be monolithically integrated on a Si-platform without any performance degradation. In this project, ultralow power, ultrahigh-speed 1.55 µm quantum dot tube lasers, laser arrays, and photodetectors will be fabricated on Si. Such nanoscale devices will also be designed as frequency comb generators, which can generate up to 40 wavelengths with a mode spacing of ~ 1 - 3 nm. Their applications in parallel optical data link, chip-level wavelength division multiplexing, and sensors will be evaluated. Through these vigorous studies, this project intends to address some of the grand challenges for achieving ultrahigh-speed, ultralow-power photonic functionalities on a CMOS chip, thereby providing a viable approach for the emerging chip-level optical communications.