Nanoscale, Commercially viable, Field Programmable Photonic Device Arrays

这项提案描述了旨在开发纳米级、商业上可行的光电子器件的平台以形成现场可编程光子器件阵列的研究。该平台承诺为电信和数据通信、计算和芯片传感领域的应用程序提供前所未有的能力和性能指标。*通过明智的设计，以及利用我的团队报告的最新发现，等离子体损失可以几乎消除，留给我们的等离子体结构只会受到其他损失机制的影响，如散射和泄漏。这使得人们可以设计出在所有三个自由度上都具有纳米尺寸的光电子器件，其面积、功耗、带宽、工作波长范围和插入损耗都超过了它们的全介质器件，如硅光子电路。值得回答的问题是，这些改进是否满足了未得到满足的需求，并将推动光电子功能、实用性和市场份额的激增。一个重要的例子是与新一代高速集成电路中的数据通信有关的：互连延迟和功耗已经成为数据路由和处理的突出瓶颈。为了缓解这些限制，基于光子电路和器件的光通信被集成到传统的电子平台中，以利用前者可以提供的高信息带宽。特别是，硅光子学已经成为光电子集成的主要平台之一，因为它在单片芯片内与成熟的CMOS工艺具有相对的制造兼容性。然而，通过全内反射来减小物理尺寸和增加集成密度的介质波导(如硅导光)受到衍射限制和交叉耦合的限制。金属在光学频率下的复介电常数导致显著的损耗，在功率衰减到可检测的水平之前，将传播长度限制在几微米。由于这些损耗，等离子体模似乎永远不会在不同点之间传输光的性能优于它们的全介质模，尽管它有潜力解决硅光子学中遇到的许多现有挑战。然而，如果这些损耗降低到一定程度，通过消除金属层中的磁场而不是从金属层中移除磁场，等离子激元模式可能提供最佳的介质，以在所有三个维度上容纳真正的纳米级结构，使这些结构能够挑战目前用于有源和无源器件的全介质硅平台的性能和主导地位。

This proposal describes research aimed at developing a platform for nanoscale, commercially viable, optoelectronic devices to form the basis of field programmable photonic device arrays. The platform promises to provide unprecedented capabilities and performance metrics for applications in the domains of tele- as well as data-communications, computing and on-chip sensing.*******Through judicious design, along with the utilization of recent discoveries reported by my group, plasmonic losses can be nearly eliminated, leaving us with plasmonic structures which only suffer from other loss mechanisms such as scattering and leakage. This in turn allows one to design optoelectronic devices that have nanometer scale dimensions in all 3 degrees of freedom with area, power consumption, bandwidth, operating wavelength range and insertion losses which surpass their all-dielectric counterparts such as Si-photonic circuits.*******The question that merits answering is whether these improvements fulfill unmet demands and would fuel a surge in optoelectronic functionality, utility and market share. An important example is one which relates to data communications in emerging generations of high-speed integrated circuits: interconnect latency and power consumption have become prominent bottlenecks in data routing and processing. To alleviate these limitations, optical communications based on photonic circuits and devices are integrated into conventional electronic platforms to take advantage of the high information bandwidth that the former can provide. In particular, silicon photonics have emerged as one of the major platforms in optoelectronics integration due to its relative fabrication compatibility with mature CMOS processing within a monolithic chip. However, dielectric waveguides such as silicon guide light via total internal reflection, and thus minimizing physical dimensions and increasing the integration density are restricted by diffraction limit and cross-coupling .*******The complex permitivity of metals at optical frequencies lead to significant losses, limiting propagation lengths to a few microns before power is attenuated below detectable levels. Due to these losses, it seems that plasmonic modes may never outperform their all-dielectric counterparts to transport light between different points despite of its potential to address many of the existing challenges encountered in Si photonics. However, if these losses are reduced beyond a certain level, through cancellation of the field in the metal layers rather than removing the field away from the metal layers, plasmonic modes may provide the optimum medium to accommodate truly nano-scale structures in all three dimensions, empowering these structures to challenge the performance and dominance of the all-dielectric Si platform used for the active and passive devices at present.******