Research Initiation: VLSI Architecture Implementation Transforms
Research Initiation: VLSI Architecture Implementation Transforms
批准号:
8806169
负责人:
Akhilesh Tyagi
金额:
$7.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
1988
资助国家:
美国
项目状态:
已结题
起止时间:
1988-06-01 至 1990-11-30
中文摘要
在VLSI体系结构的设计中,设计者可以为每个子系统提供多种性能参数选择。设计参数的选择是如此复杂,以至于很少有人探索整个设计空间。要探索替代设计,设计师唯一的办法就是完全重新设计目标部件。泰吉博士正在研究这一过程的自动化。他正在探索一组通用的设计转换,当应用于具有一组性能参数(就面积、能量和时间而言)的给定设计时,可以产生具有所需性能的设计。首席研究人员的初步研究表明,可以识别和实现这样一组转换。他正在将转换应用于移位、乘法和排序等函数的设计,并找到将这些函数组合到具有给定性能特征的体系结构中的技术。
英文摘要
In the design of a VLSI architecture, there are several choices of performance parameters for each sub-system available to a designer. The choice of design parameters is so complex that very seldom is the whole design space explored. To explore alternative designs, the only recourse a designer has is to redesign the target parts completely. Dr. Tyagi is investigating automation of this process. He is exploring a general set of design transforms that, when applied to a given design with a set of performance parameters (in terms of area, energy, and time), can produce a design with the desired performance. The principal investigator's initial research indicates that such a set of transforms can be identified and implemented. He is applying the transforms to designing functions such as shifting, multiplication and sorting, and finding techniques to compose these functions into an architecture with given performance characteristics.
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