SaTC: STARSS: Metric & CAD for DPA Resistance

SaTC：STARSS：公制

• 批准号: 1441640
• 负责人: Akhilesh Tyagi
• 金额: $ 29.88万
• 依托单位: Iowa State University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2014
• 资助国家: 美国
• 起止时间: 2014-10-01 至 2020-05-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1441640&HistoricalAwards=false
• 关键词: SaTC; STARSS; Metric; & CAD

Physical side channels pose a big threat to the security of embedded hardware. The differential power analysis (DPA) attack is a well known side channel threat which exploits the linear dependence of the power on the secret data or an intermediate value correlated to the secret data through statistical model building. This project addresses the DPA vulnerability by deploying a technology cell library consisting of private gates. The technique developed will make embedded hardware less vulnerable to side-channel attacks, thereby securing private user data and transactions.This project develops logic level and netlist level metrics to model the DPA vulnerability of a circuit. The logic level metric, called normalized variance, is efficiently computed for a logic network with switching probability and switched capacitance estimation through BDDs or other methods. The project develops a more accurate but computationally more expensive metric, which is a refinement of the normalized variance and is deployed at circuit level.

物理边信道对嵌入式硬件的安全性构成了很大的威胁。差分功率分析（DPA）攻击是一种众所周知的侧信道威胁，其通过统计模型构建来利用功率对秘密数据或与秘密数据相关的中间值的线性依赖性。该项目通过部署由私有门组成的技术单元库来解决DPA漏洞。该技术的开发将使嵌入式硬件不易受到侧信道攻击，从而保护私人用户数据和transactions.This项目开发逻辑级和网表级的指标来模拟电路的DPA漏洞。逻辑电平度量，称为归一化方差，有效地计算了一个逻辑网络的开关概率和开关电容估计通过BDD或其他方法。该项目开发了一种更准确但计算成本更高的度量，它是归一化方差的细化，并部署在电路级。