Reliable VLSI Systems for Digital Signal Processing

在这个建议中，数论技术被认为是 提供有助于高数据速率的硬件模块化， 可测试性、可靠性和容错性。一 研究计划提出，将解决的问题， 可靠性和容错性的集成电路和 更高的系统级别。卷积神经网络的模块化设计 合成孔径反投影数字处理器 雷达（SAR）图像处理将作为车辆进行研究，以解决 电路级和系统级的容错，并研究 电路级错误检查与系统级错误检查之间的相互作用 容错机制

In this proposal, number-theoretic techniques are considered to provide hardware modularity that facilitates high data rates, testability, reliability and fault tolerance in VLSI design. A research program is proposed that will address questions of reliability and fault tolerance on both the integrated circuit and the higher system level. Modular designs of a convolutional back-projection (CBP) digital processor for synthetic aperture radar (SAR) image processing will be studied as vehicles to address both circuit and system level fault tolerance, and to study the interaction between circuit level error checking and system level fault tolerance mechanisms.