RIA: Layout Design of VLSI Multichip Modules

本文研究的是超大规模集成电路（ULSI）中的布局问题。多芯片模块（MCM）布局问题的本质和相关的设计问题正在被研究。活动包括：(1)通过描述MCM技术提出的物理要求来探索MCM布局。MCM设计问题的布局模型正在构建中。模型中包含的物理约束有：层的函数（信号、电源-地、再分配）、层的排序、线的宽度和间隔、网格-无网格几何。考虑了MCM布局与传统集成电路布局的区别。(2)寻找将三维MCM布局问题分解为一组单层布局问题的技术。(3)针对MCM布局问题设计高效的算法，并将性能要求纳入算法。层最小化，性能和全局路由正在被解决。

This research is on layout problems in ultra-large-scale- integration (ULSI). The nature of the multichip module (MCM) layout problem and associated design problems are being investigated. Activities include: (1) Exploring MCM layout by characterizing the physical requirements posed by MCM technology. Layout models for the MCM design problem are being built. Physical constraints being included in the model are: functions of layers (signal, power-ground, redistribution), layer ordering, wire width and separation, and grid-gridless geometry. The differences between MCM layout and traditional IC layout are being considered. (2) Finding techniques to decompose a 3-D MCM layout problem into a set of single layer layout problems. (3) Designing efficient algorithms for the MCM layout problem and incorporating performance requirements into the algorithms. Layer minimization, performance and global routing are being addressed.