RIA: Layout Design of VLSI Multichip Modules

本文针对超大规模集成电路(ULSI)中的布局问题进行了研究。多芯片模块(MCM)布局问题和相关设计问题的性质正在调查中。活动包括：(1)通过描述MCM技术提出的物理要求来探索MCM布局。针对MCM设计问题的布局模型正在构建中。模型中包含的物理约束包括：层的功能(信号、电源接地、重新分配)、层顺序、导线宽度和间隔以及无网格几何图形。MCM版图与传统IC版图之间的差异正在被考虑。(2)寻找将3-D MCM布局问题分解为一组单层布局问题的技术。(3)为MCM布局问题设计高效的算法，并将性能要求融入到算法中。正在解决层最小化、性能和全局布线问题。

This research is on layout problems in ultra-large-scale- integration (ULSI). The nature of the multichip module (MCM) layout problem and associated design problems are being investigated. Activities include: (1) Exploring MCM layout by characterizing the physical requirements posed by MCM technology. Layout models for the MCM design problem are being built. Physical constraints being included in the model are: functions of layers (signal, power-ground, redistribution), layer ordering, wire width and separation, and grid-gridless geometry. The differences between MCM layout and traditional IC layout are being considered. (2) Finding techniques to decompose a 3-D MCM layout problem into a set of single layer layout problems. (3) Designing efficient algorithms for the MCM layout problem and incorporating performance requirements into the algorithms. Layer minimization, performance and global routing are being addressed.