CMOS IC Performance Enhancement Via Wave Pipelining

刘 波形流水线技术在提高数字系统设计的性能方面具有很好的潜力。 成功实现CMOS波形流水线需要一种设计方法，该方法将技术、工艺、电路、逻辑和系统架构设计的知识以及用于设计和测试的CAD工具紧密耦合。 虽然初步的结果已经清楚地证明了在CMOS波形流水线的可行性，波形流水线系统的有效设计需要更多的工作。 本计画主要是开发并示范以CMOS技术为基础的波形管线设计技术与超大规模积体电路结构，主要是因为其广泛的可用性与相对较低的成本。 在高速系统中，波流水线的有用应用领域包括高速采样电路、数字锁相环、MUX和DEMUX、纠错电路、光纤的数据和时钟恢复。

Liu Wave pipelining techniques have a good potential to improve the performance of a digital system design. The success of achieving CMOS wave pipelining requires a design methodology which tightly couples the knowledge of technology, process, circuit, logic, and system architecture design as well as CAD tools for design and testing. While preliminary results have clearly demonstrated the feasibility of wave pipelining in CMOS, more work is needed toward the efficient design of wave pipelined systems. This project is to develop and demonstrate design techniques and VLSI structures for wave pipelining based on CMOS technology, primarily because of its wide availability and relatively low cost. Useful application areas for wave pipelining in high speed systems include high speed sampling circuitry, digital phase locked loops, MUX and DEMUX, error correction circuits, data and clock recovery for fiber optics.