RIA: The Design of High-Performance Asynchronous Controllers

RIA：高性能异步控制器的设计

• 批准号: 9308810
• 负责人: Steven Nowick
• 金额: $ 10万
• 依托单位: Columbia University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 1993
• 资助国家: 美国
• 起止时间: 1993-09-01 至 1997-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9308810&HistoricalAwards=false
• 关键词: RIA; Design; Performance; Asynchronous; Controllers

Nowick This research concerns the development of algorithms and software tools for the design of asynchronous circuits. Previous work in the area has produced a "locally-clocked" asynchronous design style, which produces high performance implementations that are hazard-free at the gate level. Three extensions to this design style are being investigated. The first is to explore an alternative unclocked asynchronous controller design method, which only requires a single feedback cycle to implement a state change. This work includes implementation of generalized burst mode specifications to the unclocked state machines. Second is the development of extensions to hazard-free logic minimization. The extensions include: a heuristic two-level minimization algorithm; an exact product-of-sums solution; time-optimized multi-level logic synthesis; testing oriented two-level minimization; and hazard-decreasing, multi-level transforms. Third is an exploration of systematic ways to test asynchronous designs.

诺维克 本研究关注异步电路设计的算法和软件工具的发展。 以前的工作在该地区已经产生了一个“本地时钟”异步设计风格，它产生高性能的实现，在门级无风险。 目前正在研究这种设计风格的三种扩展。 第一个是探索一种替代的非同步异步控制器的设计方法，它只需要一个单一的反馈周期来实现一个状态的变化。 这项工作包括实现广义突发模式规范的非锁定状态机。 第二是无风险逻辑最小化扩展的发展。 这些扩展包括：一个启发式两级最小化算法;一个确切的产品的总和解决方案;时间优化的多级逻辑综合;面向测试的两级最小化;和风险减少，多级变换。 第三是探索系统的方法来测试异步设计。