Methodologies and CAD Tools for the Design of Asynchronous Systems

异步系统设计方法和 CAD 工具

• 批准号: 9988241
• 负责人: Steven Nowick
• 金额: $ 20.09万
• 依托单位: Columbia University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2000
• 资助国家: 美国
• 起止时间: 2000-11-15 至 2004-10-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9988241&HistoricalAwards=false
• 关键词: Methodologies; CAD; Tools; Design; Asynchronous

Asynchronous (or clockless) digital design is the focus of renewed interest, as designers face increasing challenges in future chip design. These circuits promise three important benefits: high performance, scalability and design reuse, and low power. This project is investigating two basic problems in asynchronous system design: (1) design of high-speed pipelines and pipelined datapath units (adders, multipliers, etc.), and (2) computer-aided design (CAD) algorithms and tools for the synthesis and optimization of distributed control. Multi-Giga Hertz asynchronous pipelines are being designed, where stages only communicate with their neighbors, and where timing optimizations are applied locally. Using this approach, a substantial pipelined datapath component (adder/multiplier) is being designed, laid out and evaluated. CAD tools for asynchronous distributed control are also being developed, using new bottom-up (clustering) and top-down (partitioning) algorithms.

异步（或无时钟）数字设计是重新关注的焦点，因为设计师在未来的芯片设计中面临越来越多的挑战。这些电路保证了三个重要的好处：高性能、可扩展性和设计重用，以及低功耗。本项目研究异步系统设计中的两个基本问题：(1)高速管道和流水线数据路径单元（加法器、乘法器等）的设计，以及(2)用于综合和优化分布式控制的计算机辅助设计（CAD）算法和工具。正在设计多千兆赫兹异步管道，其中阶段仅与相邻节点通信，并且在本地应用时间优化。使用这种方法，可以设计、布置和评估大量的流水线数据路径组件（加法器/乘法器）。异步分布式控制的CAD工具也正在开发中，使用新的自下而上（聚类）和自上而下（划分）算法。