Architectural and Organizational Issues for High-Performance Uniprocessors

高性能单处理器的架构和组织问题

• 批准号: 9423123
• 负责人: Douglas Clark
• 金额: $ 26.05万
• 依托单位: Princeton University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 1995
• 资助国家: 美国
• 起止时间: 1995-09-15 至 1998-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9423123&HistoricalAwards=false
• 关键词: Architectural; Organizational; Issues; Performance; Uniprocessors

Caches and write buffers are becoming increasingly important to memory hierarchy designs since they are the key components for bridging the widening performance gap between microprocessors and DRAMs. This research studies the details of memory-referencing behavior in contemporary uniprocessors such as multiple referencing behavior . In particular, the research investigates the fine distinctions that characterize data references with respect to their cache and write-buffer behavior, and also studies possible architectural and organizational enhancements that will benefit writes.

高速缓存和写缓冲器对于存储器层次结构设计变得越来越重要，因为它们是弥合微处理器和DRAM之间不断扩大的性能差距的关键组件。 本研究探讨当代单处理器中记忆参照行为的细节，例如多重参照行为。 特别是，研究调查的细微差别，其缓存和写缓冲区的行为方面的数据引用的特点，也研究了可能的架构和组织的增强，将有利于写。