Robust VLSI

本研究的重点是在亚微米范围的逻辑，模拟和混合信号应用的电子电路的设计和制造。 这种稳健设计的新方法使用区间约束描述，而不是与制造过程相关的可变参数的统计描述。 性能评估利用先进的混合模式电路模拟器，其中半导体器件和互连内的载流子动力学在应用层面建模。 重点是算法的设计与开发工具，以帮助在复杂的VLSI电路的分析和设计的长期目标。 正在考虑的初始示例是CMOS差分放大器和CMOS反相器。

The focus of this research is on the design and manufacture of electronic circuits at the submicron range for logic, analog, and mixed-signal applications. This new approach to robust design uses an interval bound description rather than statistical description of variable parameters associated with the manufacturing process. Evaluation of performance utilizes advanced mixed-mode circuit simulators in which carrier dymanics within semiconductor devices and interconnects are modeled at the application level. The focus is on the design of algorithms with the long term goal of developing tools to aid in the analysis and design of complex VLSI circuits . Initial examples being considered are a CMOS differential amplifier and a CMOS inverter.