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Testing of Digital Circuits by Signal Waveform Analysis

Testing of Digital Circuits by Signal Waveform Analysis
通过信号波形分析测试数字电路
批准号:
9502575
负责人:
Abhijit Chatterjee
金额:
$10.91万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
1995
资助国家:
美国
项目状态:
已结题
起止时间:
1995-07-01 至 1999-12-31

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中文摘要
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英文摘要
This research is developing a new approach to manufacturing test of VLSI chips. Digital signals are treated as analog waveforms, so that logic events at internal nodes can be understood. To do this, rise-fall and glitching characteristics of output signals are being studied using time and frequency domain analog signal analysis techniques. Using this approach: 1. failure methods are being determined; 2. test generation algorithms for stuck-at faults in combinational and sequential circuits are being investigated; 3. methods to detect marginal chips are being explored; 4. very rapid wave pipelined testing is being developed. A signal waveform analysis system is being designed.
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