SaTC: STARSS: Trojan Detection and Diagnosis in Mixed-Signal Systems Using On-The-Fly Learned, Precomputed and Side Channel Tests

SaTC：STARSS：使用动态学习、预计算和侧通道测试的混合信号系统中的特洛伊木马检测和诊断

• 批准号: 1441754
• 负责人: Abhijit Chatterjee
• 金额: $ 16万
• 依托单位: Georgia Tech Research Corporation
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2014
• 资助国家: 美国
• 起止时间: 2014-10-01 至 2017-09-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1441754&HistoricalAwards=false
• 关键词: SaTC; STARSS; Trojan; Detection; Diagnosis

The use of outsourcing in silicon manufacturing has rendered hardware susceptible to malicious bugs, called Trojans, that can cause an Integrated Circuit (IC) to fail in the field, similar to the way viruses manifest themselves in software. While there has been significant inroads into Trojan detection and diagnosis in the recent past, high-resolution Trojan detection has been hampered by the increased variability in silicon manufacturing processes, allowing Trojans to hide behind the design guardbands necessitated by process variability effects. The key objective of this research is to develop techniques, algorithms and support infrastructure for detecting, diagnosing and mitigating the effects of Trojans in a variety of circuits that can cause system malfunction after deployment in the field, in the presence of process variability effects.The underlying Trojan detection techniques for both mixed-signal and digital circuits use test stimulus optimization algorithms that maximize the sensitivities of the tests applied to the presence of malicious hardware Trojans. Such algorithms are supported by hardware for delivering the tests to vulnerable hardware designs in the field. Since the nature of bugs inserted maliciously into chip designs is not known apriori, the investigators use on-the-fly learning algorithms to refine the applied tests to expose the effects of inserted Trojans. In addition, precomputed and side-channel tests are applied to increase overall test effectiveness by up to 30X over existing methods. These techniques will enable significantly increased security of US industrial and government intellectual property and prevent tampering of US chip designs by external third parties.

在硅制造中使用外包使得硬件容易受到恶意错误（称为特洛伊木马）的影响，这些错误可能导致集成电路（IC）在现场出现故障，类似于病毒在软件中表现出来的方式。虽然在最近的过去，特洛伊木马检测和诊断已经取得了重大进展，但高分辨率特洛伊木马检测受到硅制造工艺可变性增加的阻碍，使得特洛伊木马隐藏在工艺可变性效应所必需的设计保护带后面。这项研究的主要目标是开发技术，算法和支持基础设施，用于检测，诊断和减轻各种电路中的特洛伊木马的影响，这些电路在现场部署后可能导致系统故障，在存在的进程变异性的影响。底层木马检测技术，这两个混合-信号和数字电路使用测试激励优化算法，该算法最大化应用于恶意硬件特洛伊木马的存在的测试的灵敏度。这种算法由硬件支持，用于将测试传递到现场的易受攻击的硬件设计。由于恶意插入芯片设计中的漏洞的性质并不是先验的，因此研究人员使用动态学习算法来改进应用测试，以暴露插入木马的影响。此外，预计算和侧通道测试的应用，以提高整体测试效率高达30倍，比现有的方法。这些技术将大大提高美国工业和政府知识产权的安全性，并防止外部第三方篡改美国芯片设计。