Extending the Thread Execution Model for Hybrid CPU/FPGA Architectures
Extending the Thread Execution Model for Hybrid CPU/FPGA Architectures
批准号:
0311599
负责人:
David Andrews
金额:
$0.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2003
资助国家:
美国
项目状态:
已结题
起止时间:
2003-09-01 至 2007-08-31
中文摘要
近年来出现的CPU/FPGA混合芯片正在成为未来嵌入式系统COTS硬件平台的重要组成部分。 结合无线网络功能,这些混合芯片为传感器网络等广泛的分布式系统提供了显着的计算优势。 这些混合型的系统软件必须提供一套相当通用的能力来支持领域应用程序,但也必须能够专门支持每个应用程序的接口和性能需求。 为这些应用程序创建这样的能力在某种程度上是一个困难的挑战,因为它需要同时满足明显矛盾的力量:通用化和专业化。这项研究正在开发新的系统软件功能,以促进解决这些看似矛盾的要求。 研究了面向软件/FPGA实现的KU实时(KURT)Linux系统软件组件的协同设计,以实现一个跨越FPGA/CPU组件边界的熟悉的、可移植的多线程编程模型。 该研究正在开发必须在CPU和FPGA硬件上执行的线程的同步和控制方法。它侧重于增强调度能力和嵌入式传感器Web应用程序的编程环境,为新的硬件架构提供了一个熟悉的编程模型。 这项工作预计将使更有能力的实时控制(在一个芯片上)的传感器,计算和数据处理服务比目前广泛使用的传感器研究平台可以support.In除了产生新的概念和方法,传感器网络设计的研究社区,这一努力支持教育目标ofestablishing一个重点领域的工程计算机为基础的系统。在这个重点领域,我们提供嵌入式和实时系统课程,包括传感器网络,嵌入式系统运行时软件和分布式系统。 该项目通过将研究活动和成果融入课堂并产生跨学科合作,扩大了对研究生和本科生的教育影响。 在此项目下开发的软件工具、系统软件和硬件平台将免费分发给其他大学和学生实验室进行实验和项目。
英文摘要
AndrewsRecently emerging CPU/FPGA hybrid chips are becoming important componentsof COTS hardware platforms for future embedded systems. Coupled with wireless networking capabilities, these hybrid chips offer significant computational advantages for a wide domain of distributed systems such as sensor webs. Systemsoftware for these hybrids must provide a fairly general set ofcapabilities to support domain applications, butmust also be capable of specialized support for each application's interfacing and performance needs. Creating such a capability for these applications is a difficult challenge in part, because it requires the simultaneous satisfaction of apparently contradictory forces: generalization and specialization.This research is developing new system software capabilities that promotethe resolution of these seemingly contradictory requirements. Co-design of KU Real-Time (KURT) Linux system software components for software/FPGA implementation is studied to facilitate a familiar and portable multi-threaded programming model across the FPGA/CPU component boundaries. The research is developing synchronization and control methods for threads that must execute on both CPU and FPGA hardware. It focuses on enhanced scheduling capabilities and a programming environment for embedded sensor web applications that presents a familiar programming model for the new hardware architectures. This work is expected to enable more capable real-time control (on a chip) of sensing, computation, and data handling services than current widely-used sensor research platforms can support.In addition to generating new concepts and approaches to sensor web designfor the research community, this effort supports an educational goal ofestablishing a focus area in the engineering of computer based systems. Within this focus area, we courses in embedded and realtime systems including sensor webs, run time software for embeddedsystems, and distributed systems, are offered. This project broadens educational impact for both graduate and undergraduate students by integrating research activities and results into the classroom and producing interdisciplinary collaborative. The software tools, systems software, and hardware platforms developed under this project will be freely distributed to other universities and student laboratories for experimentation and projects.
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