SGER: A VLIW/Superscalar Heterogeneous Multi-core Architecture and the Compiler Support

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Intellectual MeritThis research will help to address the challenging and pressing issueof designing compiler-friendly multi-core architectures and developing effective compilersupport for automatically parallelizing single-threaded programs to fully utilize thepotential of multi-core processors. This research will also increase our understanding ofthe interactions between VLIW core(s) and superscalar core(s) on a single chip forcollaboratively exploiting multi-grained parallelisms with different behaviors. Thedeveloped simulator/compiler framework will also be made publicly available, which canfacilitate a number of stimulating follow-on researches, such as energy efficiencyevaluation of the hybrid multi-core, or studying the integration of the hybrid compiler andO.S in multi-programming environments, etc.Broader ImpactThe success of this project will open the door to a number of possiblefollow-on research projects to create practical hybrid multi-core processors and therelated software systems, which will smoothen and accelerate the transition to the multicoreprocessor-based systems and thus greatly benefit the microprocessor industry, as thesingle-thread performance can be continuously improved without fundamentallychanging the programming paradigm. The proposed hybrid multi-core architecture canalso be potentially customized for a great variety of embedded applications that demandboth high performance and energy efficiency. Moreover, since future high-performancecomputing systems are very likely to utilize the multi-core processors as the basic nodes,the transparent single-thread performance enhancement achieved by this project will alsohelp to advance the power of computing into the next generation for meeting the toughestcomputational challenges. Additionally, this project will attract and train graduatestudents in multi-core architecture and advanced compiler design, and the research resultswill also be incorporated into the graduate level computer architecture course, i.e., ECE532, to better prepare the students for this rapidly developing field.