Novel CAD Techniques for Nanometer VLSI Design

提案ID：0701821标题：纳米VLSI设计的新型CAD技术PI姓名：Martin D. F. WongPI机构：伊利诺伊州厄巴纳-尚佩恩摘要超大规模集成电路（VLSI）是现代信息和通信系统的核心。随着超大规模集成电路技术进入纳米时代，为了设计和制造未来几代复杂的超大规模集成电路系统，需要在计算机辅助设计（CAD）软件的设计方面进行重大创新。本研究计划致力发展新技术，以解决多项关键问题。本研究计划的重点包括：（1）发展超快速的OPC方法，OPC是纳米级硅芯片制造的关键软件技术。(2)设计芯片级布线的基本算法，使光刻工艺在芯片制造中引入的几何变化最小。(3)开发用于高端封装的板级布线的CAD系统，这是一个今天必须以耗时的方式手动解决的问题。(4)设计一种超快速布局算法（以确定芯片上大量电路元件的最佳位置），该算法可以处理未来芯片设计的复杂性。(5)开发基于高阶迭代方法的电网分析算法，这些算法有可能在几分钟内解决非常大的电网问题，这是对现有算法的巨大改进。

Proposal ID: 0701821Title: Novel CAD Techniques for Nanometer VLSI DesignPI name: Martin D.F. WongPI Institution: Illinois at Urbana-ChampaignAbstractVery large scale integrated circuits (VLSI) are at the heart of modern information and communication systems. As VLSI technologies advancing into the nanometer era, major innovations in the design of computer-aided design (CAD) software are needed in order to design and manufacture future generations of complex VLSI systems. The PI proposes to develop novel techniques to solve a number of critical problems.This project focuses on: (1) development of an ultra-fast methodology to OPC, a key enabling software technology in nano-scale silicon chip fabrication. (2) The design of fundamental algorithms for chip-level wiring which can minimize geometric variations to be introduced by the photo-lithography process in chip manufacturing. (3) development of a CAD system for board-level wiring of high-end packages, a problem which has to be solved manually in a time-consuming fashion today. (4) design of an ultra-fast placement algorithm (to determine optimal locations for huge number of circuit components on a chip) which can handle the complexity of future chip designs. (5) development of power-grid analysis algorithms based on higher-order iterative methods which have the potential to solve very large power-grid problems in minutes, a dramatic improvement over existing algorithms.