Research in Physical Design of VLSI

为了设计和制造未来几代复杂的VLSI芯片，本项目探索集成电路和系统物理设计的新技术。该项目侧重于(1)互连规划算法的发展，这对于设计范式从以门为中心的方法转变为以互连为中心的方法至关重要；(2)使用传输线延迟模型开发电路优化方法，该方法比基于常用的集总电路模型的算法提供更准确的结果；(3)物理设计算法的发展，可以预测芯片制造过程中光刻过程引入的错误；(4)现场可编程芯片的超快速路由技术的发展，适用于需要实时“动态”路由的可重构计算。

In order to design and manufacture future generations of complex VLSI chips, this project explores new techniques for the physical design of integrated circuits and systems. This project focuses on (1) the development of interconnect planning algorithms that are essential to the change in design paradigm from gate-centric approach to interconnect-centric approach, (2) the development of circuit optimization methods using the transmission line delay model which give more accurate results than algorithms based upon the commonly used lumped circuit models, (3) the development of physical design algorithms which can anticipate errors to be introduced by the photo-lithography process in chip manufacturing, and (4) the development of ultra-fast routing techniques for field-programmable chips suitable to be used in reconfigurable computing where "on-the-fly" routing is needed in real-time.