Research in Physical Design of VLSI

为了设计和制造未来几代复杂的超大规模集成电路芯片，该项目探讨了集成电路和系统的物理设计的新技术。该项目的重点是（1）开发互连规划算法，这对于从以门为中心的方法到以互连为中心的方法的设计范式的改变是必不可少的，（2）开发使用传输线延迟模型的电路优化方法，该方法比基于常用的集总电路模型的算法给出更准确的结果，（3）物理设计算法的发展，该算法能够预测在芯片制造中由光刻工艺引入的误差，以及（4）用于现场可编程芯片的超快速路由技术的开发，其适用于可重构计算，需要实时路由。

In order to design and manufacture future generations of complex VLSI chips, this project explores new techniques for the physical design of integrated circuits and systems. This project focuses on (1) the development of interconnect planning algorithms that are essential to the change in design paradigm from gate-centric approach to interconnect-centric approach, (2) the development of circuit optimization methods using the transmission line delay model which give more accurate results than algorithms based upon the commonly used lumped circuit models, (3) the development of physical design algorithms which can anticipate errors to be introduced by the photo-lithography process in chip manufacturing, and (4) the development of ultra-fast routing techniques for field-programmable chips suitable to be used in reconfigurable computing where "on-the-fly" routing is needed in real-time.