CAD for VLSI Manufacturability and Reliability

面向 VLSI 可制造性和可靠性的 CAD

• 批准号: 0306244
• 负责人: Martin Wong
• 金额: $ 35.5万
• 依托单位: University of Illinois at Urbana-Champaign
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2003
• 资助国家: 美国
• 起止时间: 2003-10-15 至 2007-09-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0306244&HistoricalAwards=false
• 关键词: CAD; VLSI; Manufacturability; Reliability

In this research, we propose computer-aided design (CAD) techniques that consider manufacturability and reliability of very large scaled integrated circuits (VLSI),First, we consider optical lithography which is the enabling technology for the fabrication of today's VLSI. Since feature sizes have become much smaller than the wave length of the light sources used to print them, post-design resolution enhancement techniques (RETs) such as optical proximity correction (OPC) and phase shifting mask (PSM) are used to improve their printability. Ideally, these RETs should be considered during the design steps (e.g., physical design). We propose to develop OPC/PSM-aware CAD techniques.Second, we consider next generation lithography (NGL) techniques which will potentially replace optical lithography in the future. The two leading NGL candidates are electron projection lithography (EPL) and extreme ultra-violet (EUV) lithography. Due to the structure of the membrane mask for EPL, a design needs to be partitioned and later needs to be "stitched" together. We propose to study this mask layout partitioning problem. As for EUV lithography, a major problem is caused by the absorption and scattering of EUV lights by the mask (i.e., the "flare" problem). We propose CAD techniques for solving the "flare" problem.Finally, we consider the antenna problem which is a phenomenon of plasma induced gate oxide degradation. We plan to continue our ongoing research on diode insertion/routing for fixing antenna problems.

在这项研究中，我们提出了计算机辅助设计（CAD）技术，考虑到可制造性和可靠性的超大规模集成电路（VLSI），首先，我们考虑的光学光刻，这是使今天的VLSI制造技术。由于特征尺寸已经变得比用于打印它们的光源的波长小得多，因此使用诸如光学邻近校正（OPC）和相移掩模（PSM）的设计后分辨率增强技术（RET）来改善它们的可打印性。理想情况下，应在设计步骤中考虑这些可再生能源技术（例如，物理设计）。我们建议开发OPC/PSM的CAD技术。其次，我们考虑下一代光刻（NGL）技术，这将有可能取代光学光刻在未来。两个领先的NGL候选者是电子投影光刻（EPL）和极紫外（EUV）光刻。由于用于EPL的膜掩模的结构，设计需要被分割并且稍后需要被“缝合”在一起。我们建议研究这个掩模布局分割问题。至于EUV光刻，主要问题是由掩模对EUV光的吸收和散射引起的（即，（即“flare”问题）。最后，我们考虑了天线问题，这是一种等离子体诱导栅氧化层退化的现象。我们计划继续我们正在进行的研究二极管插入/路由修复天线问题。