SHF: Small: Lithography Aware Physical Design

SHF：小型：光刻感知物理设计

• 批准号: 1320585
• 负责人: Martin Wong
• 金额: $ 45万
• 依托单位: University of Illinois at Urbana-Champaign
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2013
• 资助国家: 美国
• 起止时间: 2013-08-01 至 2017-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1320585&HistoricalAwards=false
• 关键词: SHF; Small; Lithography; Aware; Physical

Micro-chips are at the heart of modern microelectronic systems for computing, communication, entertainment, and other consumer electronics. In order to design and manufacture the next generations of complex microelectronic systems, major innovations in the design of Electronic Design Automation (EDA) software are needed. This project focuses on developing novel EDA software. In the past 50 years, the exponential growth of the semiconductor industry has been primarily fueled by the continuous advancement in Integrated Circuit (IC) manufacturing technology, allowing the industry to produce chips with ever-increasing numbers and ever-decreasing sizes of transistors and wires. Today, the most advanced silicon chips have billions of transistors and tens of miles of wires, and the minimum feature size on a chip is less than 20nm. Lithography continues to be the backbone of chip manufacturing. In advanced IC technology, lithography has become the bottleneck for the chip design process. Design for Manufacturing (DFM) is no longer an option but a necessity. Since physical design determines the locations and geometries of all the transistors and wires, it must understand the down-stream lithography process so that the layout patterns generated are printable on silicon. This is a challenging problem and the requirements oftentimes are non-intuitive to the designers. In this proposal, we study lithography-aware physical design for several leading next-generation lithography (NGL) technologies. The NGL technologies considered here are triple-patterning lithography (TPL), self-aligned double patterning (SADP), directed self-assembly (DSA) and extreme ultraviolet (EUV) lithography. All the proposed topics are critical to their respective NGL technologies and their solutions are expected to greatly impact future generations of micro-chip design for years to come. The proposed research will advance knowledge in Electronic Design Automation (EDA). It will also add new knowledge to other fields such as scientific computing and combinatorial optimization since ultimately we will need to solve large scale optimization problems. The broader impacts of this project include Very Large Scale Integration (VLSI) technology advancement and the education of next generation engineers. VLSI circuits are at the heart of modern information and communication systems. The proposed research improves the design and manufacturing of VLSI circuits, which will benefit society at large. New research results will be passed on to undergraduate and graduate students through dissertation research, course projects, homework, and classroom teaching.

微芯片是用于计算、通信、娱乐和其他消费电子产品的现代微电子系统的核心。为了设计和制造下一代复杂的微电子系统，需要在电子设计自动化（EDA）软件的设计中进行重大创新。该项目的重点是开发新型EDA软件。在过去的50年中，半导体行业的指数增长主要是由集成电路（IC）制造技术的持续进步推动的，这使得该行业能够生产具有不断增加的数量和不断减小的晶体管和导线尺寸的芯片。如今，最先进的硅芯片拥有数十亿个晶体管和数十英里长的导线，芯片上的最小特征尺寸小于20纳米。光刻仍然是芯片制造的支柱。在先进的IC技术中，光刻已成为芯片设计过程的瓶颈。面向制造的设计（DFM）不再是一种选择，而是一种必要。由于物理设计决定了所有晶体管和导线的位置和几何形状，因此必须了解下游光刻工艺，以便生成的布局图案可以在硅上打印。这是一个具有挑战性的问题，并且要求通常对设计者来说是非直观的。在这个建议中，我们研究了几个领先的下一代光刻（NGL）技术的光刻感知物理设计。这里考虑的NGL技术是三重图案化光刻（TPL）、自对准双重图案化（SADP）、定向自组装（DSA）和极紫外（EUV）光刻。所有提出的主题都对各自的NGL技术至关重要，预计他们的解决方案将在未来几年内对未来几代微芯片设计产生重大影响。拟议的研究将推进电子设计自动化（EDA）的知识。它还将为其他领域增加新的知识，如科学计算和组合优化，因为最终我们需要解决大规模优化问题。该项目的更广泛影响包括超大规模集成电路（VLSI）技术进步和下一代工程师的教育。VLSI电路是现代信息和通信系统的核心。该研究改进了超大规模集成电路的设计和制造，这将有利于整个社会。新的研究成果将通过论文研究，课程项目，家庭作业和课堂教学传递给本科生和研究生。