CPA-CSA-T: Low Cost and Comprehensive Hardware Reliability

CPA-CSA-T：低成本和全面的硬件可靠性

• 批准号: 0811693
• 负责人: Sarita Adve
• 金额: $ 50万
• 依托单位: University of Illinois at Urbana-Champaign
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2008
• 资助国家: 美国
• 起止时间: 2008-09-01 至 2013-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0811693&HistoricalAwards=false
• 关键词: CPA; CSA; Low; Cost; Comprehensive

Hardware reliability is becoming an increasing concern in the late CMOS era. Components in shipped chips will fail for many reasons, requiring mechanisms to detect, diagnose, recover from, and repair/reconfigure around these failed components so that the system can provide reliable operation. The pervasiveness of the problem across a broad market demands low-cost and general reliability solutions that can be deployed in general-purpose, commodity systems running applications with varying reliability requirements. Traditional reliability solutions involving excessive redundancy are too expensive, as are piecemeal solutions that address individual failure modes. This work proposes a full system solution that aims to provide a common framework for error detection, diagnosis, recovery, and repair/reconfiguration for a variety of hardware failure modes, with a customizable reliability vs. overhead tradeoff.Two key high-level observations motivate the approach. First, the hardware reliability solutions need handle only the device faults that propagate through higher levels of the system and become observable to software. Second, in spite of the reliability threat, fault-free operation remains the common case and must be optimized, possibly at the cost of increased overhead once a fault is detected. The proposed system therefore detects faults by watching for anomalous software behavior (or symptoms of faults), using novel zero to low-cost hardware and software monitors. After a fault is detected, it invokes an innovative, but potentially expensive, procedure for diagnosing the fault source to enable reconfiguration/repair (in the case of hard faults). For recovery, it relies on a checkpoint/replay mechanism, including pure hardware and hybrid software assisted recovery depending on detection latency. Coordinating all of the above is a thin firmware layer that provides flexibility and customizability. A major component of the work is a much needed formulation and validation of microarchitecture level fault models, required to drive high-level reliability solutions.

在CMOS时代后期，硬件可靠性越来越受到关注。装运芯片中的组件将由于许多原因而失效，需要机制来检测、诊断、从这些失效组件恢复以及修复/重新配置这些失效组件，使得系统可以提供可靠的操作。这个问题在广泛的市场中普遍存在，需要低成本和通用的可靠性解决方案，这些解决方案可以部署在运行具有不同可靠性要求的应用程序的通用商品系统中。涉及过多冗余的传统可靠性解决方案过于昂贵，解决单个故障模式的零碎解决方案也是如此。这项工作提出了一个完整的系统解决方案，旨在提供一个通用的框架，错误检测，诊断，恢复和修复/重新配置的各种硬件故障模式，可定制的可靠性与开销tradeoff.Two关键的高层次的观察激励的方法。首先，硬件可靠性解决方案只需要处理通过系统的更高级别传播并可被软件观察到的设备故障。其次，尽管存在可靠性威胁，但无故障操作仍然是常见的情况，必须进行优化，这可能是以一旦检测到故障就会增加开销为代价的。因此，所提出的系统通过观察异常的软件行为（或故障的症状），使用新的零到低成本的硬件和软件监视器来检测故障。在检测到故障之后，它调用用于诊断故障源的创新的但可能昂贵的过程，以启用重新配置/修复（在硬故障的情况下）。对于恢复，它依赖于检查点/重放机制，包括纯硬件和混合软件辅助恢复，具体取决于检测延迟。协调上述所有内容的是一个薄固件层，它提供了灵活性和可定制性。这项工作的一个主要组成部分是一个非常需要的制定和验证的微架构级故障模型，需要驱动高级别的可靠性解决方案。