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SHF: Small: DeNovo: Rethinking Hardware for Disciplined Parallelism

SHF: Small: DeNovo: Rethinking Hardware for Disciplined Parallelism
SHF:小型:DeNovo:重新思考硬件以实现严格的并行性
批准号:
1018796
负责人:
Sarita Adve
金额:
$50.0万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2010
资助国家:
美国
项目状态:
已结题
起止时间:
2010-09-15 至 2014-08-31

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中文摘要
翻译
设计可扩展、低成本、高能效且易于编程的并行系统,可以说是当今计算行业面临的最大挑战之一。这份提案描述了DeNovo,这是一个硬件架构和框架,它从头开始重新思考共享内存系统的设计,以利用纪律严明的并行软件的长期趋势。它的立场是,如果具有数百个核心的共享内存多核系统要得到广泛使用,编程语言和环境必须发展,以实施严格纪律的编程实践,从而极大地简化程序员对共享内存的看法。这些语言必须限制共享内存交互,默认情况下强制数据竞争自由和决定论。此外,严格的编程模型传递有关共享内存访问模式的大量信息(因此可以强制执行)。利用并行性原则和通信信息可以实现比今天更简单和更高效的硬件设计。DeNovo基于三个想法提出了一种广泛的重新设计存储器层次结构的方案。首先,一致性协议可以通过利用不存在软件竞争的优势来大大简化,从而从协议中虚拟地消除竞争,并极大地减少隐藏协议状态的数量。其次,DeNovo使用应用程序级数据共享粒度(而不是软件无关的缓存线)作为寻址、通信和一致性粒度的组织原则。第三,DeNovo使用更高效的点对点通信(接近显式消息传递),通过最大限度地减少通过目录的间接性并利用有关批量数据传输的共享粒度的信息,即使对于共享内存程序也是如此。这些变化将同时简化硬件设计、降低功耗并提高性能。如果不对存储系统设计进行根本性的反思,这样的解决方案是非常不可能的,但要继续从摩尔定律中获益,就必须这样做。
英文摘要
Designing parallel systems that are scalable, low-cost, and power efficient, and yet easily programmable, is arguably one of the biggest challenges facing the computing industry today. This proposal describes DeNovo, a hardware architecture and framework that rethinks shared memory system design from the ground up to take advantage of long term trends in disciplined parallel software. It takes the stance that, if shared memory multicore systems with hundreds of cores are to become widely used, programming languages and environments must evolve to enforce highly disciplined programming practices that greatly simplify the programmer's view of shared memory. Such languages must restrict shared memory interactions, enforcing data-race-freedom and determinism-by-default. Moreover, disciplined programming models communicate extensive information about shared memory access patterns (so the discipline can be enforced). Exploiting the parallelism discipline and the communicated information can enable far simpler and more efficient hardware design than possible today.DeNovo proposes an extensive redesign of the memory hierarchy based on three ideas. First, the coherence protocol can be vastly simplified by taking advantage of the absence of software races to virtually eliminate races from the protocol and greatly reduce the number of hidden protocol states. Second, DeNovo uses application-level data sharing granularity (rather than software-oblivious cache lines) as the organizing principle for addressing, communication, and coherence granularities. Third, DeNovo uses more efficient, point-to-point communication (close to explicit message passing) even for shared memory programs, by minimizing indirections through the directory and exploiting information about sharing granularity for bulk data transfers. These changes will simultaneously simplify the hardware design, reduce power consumption, and improve performance. Such a solution is highly unlikely without a fundamental rethinking of the memory system design, but is required to continue to reap the benefits of Moore's law.
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