Scaling Limits of Programmable Fluidic Self-Assembly Forming Electrical Interconnects

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ObjectiveThe objective of this research is to develop a process to integrate functional semiconducting devices across length scales and material boundaries in a parallel manner. The first objective is to enable chip level self-assembly (currently performed with mm-sized components) at the 100 nm ¡V 50 ?Ým length scale. The second objective is to develop a process to assemble components, micro/nanochips with single angular orientation to enable ¡§Nano-Flip-Chip-Assembly¡¨ with contact pad registration. The approach utilizes surface tension to direct the self-assembly process. Intellectual MeritThe components are orders of magnitude smaller than current state of the art considering serial robotic pick and place. In a broader sense, the ability to localize arbitrary materials and devices on arbitrary substrates allows the merging of technologies based on otherwise incompatible materials. Applications include flexible high performance electronics, solar cells, and sensor systems to gather optical, acoustic, chemical, and/or radiological data that would improve many areas of our daily lives including healthcare, the environment, energy, food safety, manufacturing, and national security. Broader ImpactThe proposed effort will lead to the development of seminars for undergraduate students. Undergraduate students will also be involved in the research through an honors thesis project, and through REU and UROP opportunities. The PI is also engaged with the Science Museum in Minnesota.