Universal Chip Assembly and Interconnection Process - Development and Applications

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The objective of this research is to develop a process to assemble and interconnect functional semiconducting devices across length scales and material boundaries in a massively parallel manner. The goals are to reduce the minimal component size far beyond current levels while supporting the ability to from electrical interconnects between the assembled structures. The approach is based on self-assembly instead of robotic pick and place. The intellectual merit of this research is to establish a knowledge base that will enable the engineering of self-assembly processes. This requires development of a comprehensive understanding of the forces that can be used and of the environments that are necessary to direct the assembly process.Broader impacts: The ability to assemble and interconnect materials and devices on arbitrary substrates allows the merging of technologies based on otherwise incompatible materials. Applications include flexible high performance electronics, solar cells, and sensor systems to gather optical, acoustic, chemical, and/or radiological data that would improve many areas of our daily lives including healthcare, the environment, energy, food safety, manufacturing, and national security. The research effort and new knowledge base will lead to the development of seminars and course materials, which will impact graduate and advanced undergraduate students beyond those that are directly involved in the research.