Heterogeneous Multi-core Architectures from Homogeneous Arrays using Configurable Interconnect

使用可配置互连的同构阵列的异构多核架构

• 批准号: 0903471
• 负责人: Kevin Skadron
• 金额: $ 28万
• 依托单位: University of Virginia Main Campus
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2009
• 资助国家: 美国
• 起止时间: 2009-08-01 至 2013-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0903471&HistoricalAwards=false
• 关键词: Heterogeneous; Multi; core; Architectures; Homogeneous

Recent trends in microprocessor design are shifting toward incorporation of heterogeneous core types onto the same die. However, current design techniques provision only a fixed set of cores and suffer from poor resource utilization when the workload is not a good match for those resources and the system cannot efficiently employ all resources simultaneously. Hardware should adapt the organization of the heterogeneous cores in response to dynamic behavior. This project lays the groundwork for realizing such a dynamic heterogeneous processor - the field programmable core array (FPCA) - that is capable of simultaneously implementing many heterogeneous architectural configurations on a configurable, homogeneous platform. The required flexibility will be provided through a combination of architecture, circuit, and EDA advances. The intellectual merit of this project is the technique of separating a processor's front end and functional units into homogeneous pools of building blocks, and development of a programmable interconnect allowing these building blocks to be coupled and decoupled dynamically, enabling efficient intra- and inter-core connectivity and the assembly of a variety of heterogeneous organizations. The broader impact will be the development of a new design paradigm that allows the same chip to be used for a wider range of markets and workloads. This reduces design and procurement costs, while improving programmer productivity - all of which will provide economic and social benefits. This project also includes education and outreach activities, including improved teaching of emerging programming models and outreach to high school students and underrepresented groups.

微处理器设计的最新趋势正在转向将异构核心类型合并到同一管芯上。然而，当前的设计技术仅提供一组固定的核，并且当工作负载与这些资源不匹配并且系统不能同时有效地使用所有资源时，资源利用率很差。 硬件应该适应异构核心的组织，以响应动态行为。 这个项目奠定了基础，实现这样一个动态的异构处理器-现场可编程核心阵列（FPCA）-这是能够同时实现许多异构的架构配置在一个可配置的，同质的平台。所需的灵活性将通过结合架构，电路和EDA的进步。该项目的智力价值是将处理器的前端和功能单元分离成同质构建块池的技术，以及允许这些构建块动态耦合和解耦的可编程互连的开发，从而实现高效的核内和核间连接以及各种异构组织的组装。更广泛的影响将是开发一种新的设计模式，允许同一芯片用于更广泛的市场和工作负载。 这降低了设计和采购成本，同时提高了程序员的生产力-所有这些都将带来经济和社会效益。该项目还包括教育和外联活动，包括改进新的方案拟订模式的教学，以及向高中生和代表性不足的群体开展外联活动。