EAGER: Collaborative Research: Heterogeneous Cores, Memory-Hierarchy and Communication Architectures for Future CMPs
EAGER:协作研究:未来 CMP 的异构核心、内存层次结构和通信架构
基本信息
- 批准号:1147406
- 负责人:
- 金额:$ 10万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Standard Grant
- 财政年份:2011
- 资助国家:美国
- 起止时间:2011-09-01 至 2013-08-31
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
Computing has enabled immense innovations in many fields and sociallife due to continued performance, power, and cost improvementsenabled by technology scaling. Unfortunately, two key trends threatenperformance and cost improvement of computers going into thefuture. First, technology scaling is at jeopardy, leading to majorchallenges in power consumption, reliability, and performance. Second,power and energy consumption has become a key constraint, yet existingsystems are mostly designed in a one-size-fits-all way agnostic to theneeds of different applications. To overcome both problems, thisresearch investigates novel uses of heterogeneous technologies inthree key components of a computing system: cores, interconnect, andmemory. The approach taken is an application-driven approach that aimsto seamlessly integrate heterogeneity in the three components. Majorexpected contributions of the research include: (1) an initial studyof first-principles based and application-driven design of cores, (2)new mechanisms for enabling phase-change memory based heterogeneousmain memory, (3) exploration of tradeoffs in the design of3-dimensional optical interconnects, (4) initial exploration of theinteraction of heterogeneous components in cores, interconnect, andmemory.The proposed research has the potential to transform the design andarchitecture of future multi-core systems, which are already a part ofthe entire IT sector and our daily lives. It can enable overcoming keychallenges that impediment higher-performance and lower-powerlower-cost computing, which has traditionally enabled new applicationsand discoveries. Enabling fundamentally efficient heterogeneousmulti-core systems can largely reduce energy and technology-scalingcosts of computing, and improve dependability and performance. Directtransfer of many ideas to industry are expected through extensivecollaborations with platform and chip design industries.
由于技术扩展带来的持续性能、功耗和成本改进,计算在许多领域和社会生活中实现了巨大的创新。不幸的是,两个关键的趋势阻碍了未来计算机性能和成本的提高。首先,技术扩展处于危险之中,导致功耗,可靠性和性能方面的重大挑战。其次,电力和能源消耗已成为一个关键的制约因素,但现有的系统大多是在一个尺寸适合所有的方式不可知的不同应用的需求。为了克服这两个问题,本研究探讨了异构技术在计算系统的三个关键组件:核心、互连和内存中的新用途。所采用的方法是一种应用程序驱动的方法,旨在无缝集成三个组件中的异构性。本研究的主要预期贡献包括:(1)基于第一原理和应用驱动的核设计的初步研究,(2)实现基于相变存储器的异构主存的新机制,(3)探索三维光互连设计中的权衡,(4)初步探索核、互连、这项研究有可能改变未来多核系统的设计和架构,这已经是整个IT行业和我们日常生活的一部分。它可以帮助克服阻碍高性能、低功耗、低成本计算的关键挑战,而传统上,高性能、低功耗、低成本计算可以带来新的应用和发现。 实现从根本上高效的异构多核系统可以大大降低计算的能源和技术扩展成本,并提高可靠性和性能。通过与平台和芯片设计行业的广泛合作,许多想法有望直接转移到行业。
项目成果
期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
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Luca Carloni其他文献
Luca Carloni的其他文献
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{{ truncateString('Luca Carloni', 18)}}的其他基金
SHF : Medium : Collaborative Research: Decentralized On-Chip Infrastructure for Robustness and Portability in Heterogeneous Multicores
SHF:媒介:协作研究:异构多核中的分散片上基础设施的稳健性和可移植性
- 批准号:
1764000 - 财政年份:2018
- 资助金额:
$ 10万 - 项目类别:
Continuing Grant
SHF: Small: Rethinking CAD for System-Level Design via Interactivity, Learning, and Collaboration
SHF:小型:通过交互性、学习和协作重新思考 CAD 的系统级设计
- 批准号:
1527821 - 财政年份:2015
- 资助金额:
$ 10万 - 项目类别:
Standard Grant
SHF: Small: Synthesis-Driven Methods for Reuse, Integration, and Programming of Specialized Accelerators in Systems-on-Chip
SHF:小型:用于片上系统中专用加速器的重用、集成和编程的综合驱动方法
- 批准号:
1219001 - 财政年份:2012
- 资助金额:
$ 10万 - 项目类别:
Continuing Grant
CPS: Medium: Collaborative Research: GOALI: Methods for Network-Enabled Embedded Monitoring and Control for High-Performance Buildings
CPS:中:协作研究:GOALI:高性能建筑的网络嵌入式监控方法
- 批准号:
0931870 - 财政年份:2010
- 资助金额:
$ 10万 - 项目类别:
Continuing Grant
SHF: Small: Integrated Infrastructures for On-Chip Communication and Power Management in Message-Passing Multicore Processors
SHF:小型:消息传递多核处理器中片上通信和电源管理的集成基础设施
- 批准号:
1018236 - 财政年份:2010
- 资助金额:
$ 10万 - 项目类别:
Standard Grant
CPA-CSA: Photonic Interconnection Networks for Chip-Multiprocessor Computing Systems
CPA-CSA:用于芯片多处理器计算系统的光子互连网络
- 批准号:
0811012 - 财政年份:2008
- 资助金额:
$ 10万 - 项目类别:
Continuing Grant
CAREER: Integrating Control, Computation, and Communication - A Design Automation Flow for Distributed Embedded Systems
职业:集成控制、计算和通信 - 分布式嵌入式系统的设计自动化流程
- 批准号:
0644202 - 财政年份:2007
- 资助金额:
$ 10万 - 项目类别:
Standard Grant
CMOS VLSI Design of Low Power Scalable Heterogeneous Networks for Multi-Core Systems-on-Chip
多核片上系统低功耗可扩展异构网络 CMOS VLSI 设计
- 批准号:
0541278 - 财政年份:2006
- 资助金额:
$ 10万 - 项目类别:
Continuing Grant
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