SHF: Small: Synthesis-Driven Methods for Reuse, Integration, and Programming of Specialized Accelerators in Systems-on-Chip

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A System-on-Chip (SoC) is the emerging computing platform that lies at the core of a variety of systems from computer servers in data centers to embedded systems and mobile devices. As semiconductor technology progresses, in order to deliver higher performance under tighter power constraints, SoCs increasingly combine various programmable cores, which provide precious flexibility through software, with many specialized accelerators, hardware modules optimized to execute only specific functions without dissipating too much power. The result is a heterogeneous system that is energy efficient but also very difficult to design. Indeed, the growth of SoC complexity has been outpacing progress in the computer-aided design (CAD) tools which are available to computer engineers. This design-productivity gap is a gloomy trend for the entire semiconductor industry. The PI will address this challenge by establishing Supervised Design-Space Exploration as the foundation for a new component-based design environment in which hardware-accelerator developers, software programmers and system architects can interact effectively while they each pursue their specific goals. In particular, the PI will develop CAD methodologies and tools that: (1) at the component-level, assist developers and programmers in the cost/performance modeling and optimization of accelerators to enable architectural exploration and to increase their reusability across many potential SoC designs; and (2) at the system-level, assist architects in the automatic integration of accelerators and other heterogeneous components to obtain an optimal implementation of a given SoC.This proposal will allow the PI to train graduate and undergraduate students in the design and programming of innovative SoC platforms for a variety of application domains from computer vision to security and networking. A core part of the proposal is the development of a new capstone course that is aimed at breaking the historical boundaries between software programming and hardware design which are still present across many electrical engineering and computer science curricula.