SHF: Small: Synthesis-Driven Methods for Reuse, Integration, and Programming of Specialized Accelerators in Systems-on-Chip

SHF：小型：用于片上系统中专用加速器的重用、集成和编程的综合驱动方法

• 批准号: 1219001
• 负责人: Luca Carloni
• 金额: $ 45万
• 依托单位: Columbia University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2012
• 资助国家: 美国
• 起止时间: 2012-07-01 至 2017-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1219001&HistoricalAwards=false
• 关键词: SHF; Small; Synthesis; Driven; Methods

A System-on-Chip (SoC) is the emerging computing platform that lies at the core of a variety of systems from computer servers in data centers to embedded systems and mobile devices. As semiconductor technology progresses, in order to deliver higher performance under tighter power constraints, SoCs increasingly combine various programmable cores, which provide precious flexibility through software, with many specialized accelerators, hardware modules optimized to execute only specific functions without dissipating too much power. The result is a heterogeneous system that is energy efficient but also very difficult to design. Indeed, the growth of SoC complexity has been outpacing progress in the computer-aided design (CAD) tools which are available to computer engineers. This design-productivity gap is a gloomy trend for the entire semiconductor industry. The PI will address this challenge by establishing Supervised Design-Space Exploration as the foundation for a new component-based design environment in which hardware-accelerator developers, software programmers and system architects can interact effectively while they each pursue their specific goals. In particular, the PI will develop CAD methodologies and tools that: (1) at the component-level, assist developers and programmers in the cost/performance modeling and optimization of accelerators to enable architectural exploration and to increase their reusability across many potential SoC designs; and (2) at the system-level, assist architects in the automatic integration of accelerators and other heterogeneous components to obtain an optimal implementation of a given SoC.This proposal will allow the PI to train graduate and undergraduate students in the design and programming of innovative SoC platforms for a variety of application domains from computer vision to security and networking. A core part of the proposal is the development of a new capstone course that is aimed at breaking the historical boundaries between software programming and hardware design which are still present across many electrical engineering and computer science curricula.

片上系统（SoC）是处于从数据中心中的计算机服务器到嵌入式系统和移动的设备的各种系统的核心的新兴计算平台。随着半导体技术的进步，为了在更严格的功率约束下提供更高的性能，SoC越来越多地将各种可编程内核（其通过软件提供宝贵的灵活性）与许多专用加速器、被优化为仅执行特定功能而不消耗太多功率的硬件模块进行联合收割机组合。其结果是一个异构的系统，是能源效率，但也非常难以设计。事实上，SoC复杂性的增长已经超过了计算机工程师可用的计算机辅助设计（CAD）工具的进步。这种设计-生产力差距是整个半导体行业的一个悲观趋势。 PI将通过建立监督设计空间探索作为新的基于组件的设计环境的基础来应对这一挑战，在该环境中，硬件加速器开发人员，软件程序员和系统架构师可以在各自追求特定目标的同时进行有效的交互。具体而言，PI将开发CAD方法和工具，以：（1）在组件级，帮助开发人员和程序员进行加速器的成本/性能建模和优化，以实现架构探索，并提高其在许多潜在SoC设计中的可重用性;以及（2）在系统级，帮助架构师自动集成加速器和其他异构组件，以获得给定SoC的最佳实现。该提案将允许PI培训研究生和本科生设计和编程创新SoC平台，用于从计算机视觉到安全和网络的各种应用领域。该提案的核心部分是开发一个新的顶点课程，旨在打破软件编程和硬件设计之间的历史界限，这些界限仍然存在于许多电气工程和计算机科学课程中。