CPA-CSA: Photonic Interconnection Networks for Chip-Multiprocessor Computing Systems

CPA-CSA：用于芯片多处理器计算系统的光子互连网络

• 批准号: 0811012
• 负责人: Luca Carloni
• 金额: $ 40万
• 依托单位: Columbia University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2008
• 资助国家: 美国
• 起止时间: 2008-07-01 至 2012-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0811012&HistoricalAwards=false
• 关键词: CPA; CSA; Photonic; Interconnection; Networks

The impact of communication on the performance of computer systems continues togrow both at the macro-level for blade servers and clusters of computers, andat the micro-level in multi-core processors. Meanwhile the tight on-chip powerdissipation constraints have forced practically all major semiconductorcompanies to move to multi-core or chip multiprocessor (CMP) architectures. The emergence of CMPs has in turn placed increased challenges on thecommunications infrastructure as the growing number of processing coresintegrated on each chip exacerbates the bandwidth requirements for bothintra-chip and inter-chip communication. This research aims to harness the recent extraordinary advances innanoscale silicon photonic technologies for developing optical interconnection networks that address the critical bandwidth and power challenges of futureCMP-based system. The insertion of photonic interconnection networks essentially changes the power scaling rules: once a photonic path is established, the data are transmitted end-to-end without the need for repeating, regeneration or buffering. This means that the energy for generating and receiving the data is only expended once per communication transaction anywhere across the computing system. The PIs will investigate the complete cohesive design of an on-chip optical interconnection network that employs nanoscale CMOS photonic devices and enables seamless off-chip communications to other CMP computing nodes and to external memory. System-wide optical interconnection network architectures will be specifically studied in the context of stream processing models of computation.

通信对计算机系统性能的影响在刀片服务器和计算机集群的宏观层面以及多核处理器的微观层面都在持续增长。与此同时，严格的片上功耗限制迫使几乎所有主要半导体公司转向多核或芯片多处理器（CMP）架构。 CMP 的出现反过来给通信基础设施带来了更大的挑战，因为每个芯片上集成的处理核心数量不断增加，加剧了芯片内和芯片间通信的带宽要求。这项研究旨在利用纳米级硅光子技术的最新进展来开发光学互连网络，以解决未来基于 CMP 的系统的关键带宽和功率挑战。光子互连网络的插入本质上改变了功率缩放规则：一旦建立光子路径，数据就可以端到端传输，无需重复、再生或缓冲。这意味着在计算系统中任何地方的每个通信事务中，用于生成和接收数据的能量仅消耗一次。 PI 将研究片上光学互连网络的完整聚合设计，该网络采用纳米级 CMOS 光子器件，并实现与其他 CMP 计算节点和外部存储器的无缝片外通信。将在计算流处理模型的背景下专门研究全系统光互连网络架构。