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CSR: Small: Adaptive Brink-of-Failure Memory Architectures for Future Technologies and Workloads

CSR: Small: Adaptive Brink-of-Failure Memory Architectures for Future Technologies and Workloads
CSR:小型:适用于未来技术和工作负载的自适应故障边缘内存架构
批准号:
1423583
负责人:
Rajeev Balasubramonian
金额:
$49.91万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2014
资助国家:
美国
项目状态:
已结题
起止时间:
2014-08-01 至 2018-07-31

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中文摘要
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英文摘要
Computer systems are expected to provide correct outputs at all times, and are therefore operated very conservatively. Unfortunately, this conservativeness leaves significant performance untapped. The objective of this project is to capture this untapped performance by selectively relaxing the operating conditions while recovering from any resulting errors. The project will investigate if such a system is especially well suited for workloads that can tolerate occasional errors. If successful, the project will yield technologies that can boost performance and lay the foundations for new kinds of algorithms.Computer systems have generous timing margins so they can behave correctly in spite of parameter variations, voltage noise, temperature fluctuations, etc. The project attempts to shave these timing margins in the memory system to safely push its performance to its limits. The memory controller can handle different parts of the memory system differently, depending on the parameter variation that is observed. Such a capability will be even more vital in future technologies where parameter variations will mandate generous timing margins. When a memory controller operates on the brink of failure, some errors are inevitable. To cope with such errors, the memory system will be augmented with a tailor-made error correction system. The proposed memory system will be an excellent fit for emerging "approximate computing" workloads. In addition to simulation-based studies, the project will develop an FPGA prototype of the adaptive memory controller and will carry out an empirical analysis of timing margins in off-the-shelf commodity memory chips. The project spans multiple layers of the system stack, with key innovations to the hardware, operating system, programming models, and applications. The proposed work will increase the community's understanding of parameter variation and the merits of different approaches to exploit these variations. It will help create a new class of promising applications. The project will also support the educational mission at the University of Utah and various outreach efforts.
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