SHF: Small: Acceleration Strategies for Emerging Life Science Workloads

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Computational approaches have sparked several advancements in healthcare. The promise of precision medicine hinges on the ability to perform a vast amount of computations at very high performance. Many research efforts have explored hardware/software innovations customized for genomic analysis. However, novel custom hardware (aka accelerators) for genomic analysis has not had much if any commercial success. A key factor in this limited commercial success is the high cost of a large custom chip that is produced at relatively low volume. On the other hand, the popularity and success of artificial intelligence (AI) has resulted in a much larger market for AI chips, and a range of commercially available chips for AI. The key research question being answered in this project is: can the success of AI and AI hardware be leveraged to advance performance and efficiency for small-market domains? This project attempts to answer this question for the healthcare domain with a focus on two emerging workloads - Computational Pathology and Genomic Analysis. It will also develop software infrastructure for the community, augment educational curricula, and help grow a diverse, well-trained workforce.The project will pursue the following novel approach: bootstrap accelerators for emerging domains on existing hardware accelerators for AI. In particular, it explores an AI+X approach, where the hardware is designed to handle AI workloads and another small-market workload X (in this project, X will be either Computational Pathology or Genomic Analysis). The project aspires to design accelerator chips that can be produced at high volume for both AI and healthcare domains, while nearly matching the efficiency of accelerators dedicated exclusively for AI or exclusively for healthcare. The project will design a configurable architecture that provides high flexibility, high efficiency, and low cost. It will explore algorithm re-structuring to fully exploit the capabilities of AI+X hardware. This includes techniques to alleviate the memory bottleneck, identify optimal mapping of software to hardware, and transform compute kernels into easily-accelerated tensor operations.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.