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SaTC: STARSS: Small: Tackling the Corner Cases: Finding Security Vulnerabilities in CPU Designs

SaTC: STARSS: Small: Tackling the Corner Cases: Finding Security Vulnerabilities in CPU Designs
SaTC:STARSS:小型:解决极端情况:查找 CPU 设计中的安全漏洞
批准号:
1816637
负责人:
Cynthia Sturton
金额:
$33.33万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2018
资助国家:
美国
项目状态:
已结题
起止时间:
2018-10-01 至 2022-09-30

项目摘要

项目成果

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中文摘要
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英文摘要
Computing hardware including processors, memory banks, and communication busses can harbor vulnerabilities that allow an attacker to gain unauthorized access to the programs and data on a machine. Hardware designers and security experts expend considerable time and effort to eliminate these vulnerabilities early in the design stage. The focus of this research is to support these activities towards improving efficiency and outcomes. In developing the methodologies and tools to find and contextualize hardware security vulnerabilities, this research will move the field of security validation of hardware designs forward.The research targets the security validation of central processing units in the design stage. The project has two goals: 1) To identify security critical properties of a processor. These properties will be stated in a temporal logic over the register transfer level design. 2) To develop the methodology and tools to automatically find and contextualize violations of those properties. A key innovation of this research will be the application of symbolic execution to hardware designs. In order to make symbolically executing a complex hardware design through multiple clock cycles feasible, the research will develop a targeted, backward search strategy.If successful, the project has the potential to significantly reduce the opportunity for a malicious actor to launch an effective attack against hardware, improving the security of computer systems.The tools, testbenches, papers, and presentations resulting from this research will be available at a site linked from https://cs.unc.edu/~csturton.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
期刊论文(6)
专著(0)
科研奖励(0)
会议论文
Mining Security Critical Linear Temporal Logic Specifications for Processors
采矿安全关键的线性时态逻辑处理器规范
DOI: 10.1109/mtv.2018.00013
发表时间: 2018
期刊: 19th International Workshop on Microprocessor and SOC Test and Verification (MTV
影响因子: --
作者: [Deutschbein, Calvin, Sturton, Cynthia]
通讯作者: Sturton, Cynthia
DOI: 10.1109/host45689.2020.9300291
发表时间: 2020
期刊: 2020 IEEE Hardware Oriented Security and Trust (HOST
影响因子: --
作者: [Deutschbein, Calvin, Sturton, Cynthia]
通讯作者: Sturton, Cynthia
End-to-End Automated Exploit Generation for Processor Security Validation
用于处理器安全验证的端到端自动漏洞利用生成
DOI: 10.1109/mdat.2021.3063314
发表时间: 2021
期刊: IEEE Design & Test
影响因子: 2
作者: [Zhang, Rui, Deutschbein, Calvin, Huang, Peng, Sturton, Cynthia]
通讯作者: Sturton, Cynthia
DOI: 10.1145/3474376.3487286
发表时间: 2021-06
期刊: Proceedings of the 5th Workshop on Attacks and Solutions in Hardware Security
影响因子: --
作者: [Calvin Deutschbein;Andres Meza;Francesco Restuccia;R. Kastner;C. Sturton]
通讯作者: Calvin Deutschbein;Andres Meza;Francesco Restuccia;R. Kastner;C. Sturton
6
    Collaborative Research: SaTC: CORE: Medium: Hardware Security Insights: Analyzing Hardware Designs to Understand and Assess Security Weaknesses and Vulnerabilities
    CPS: Frontier: Collaborative Research: VeHICaL: Verified Human Interfaces, Control, and Learning for Semi-Autonomous Systems
    EAGER: Identifying Security Critical Properties of a Processor
    CRII: SaTC: Detecting Security Vulnerabilities in Instruction Set Architectures
    海外基金