SaTC: STARSS: Small: IoT Circuit Locking, Obfuscation & Authentication Kernel (CLOAK), A Compilable Architecture for Secure IoT Device Production, Testing, Activation & Ope

SaTC：STARSS：小型：物联网电路锁定、混淆

• 批准号: 2200446
• 负责人: Avesta Sasan
• 金额: $ 30万
• 依托单位: University of California-Davis
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2021
• 资助国家: 美国
• 起止时间: 2021-10-01 至 2022-09-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2200446&HistoricalAwards=false
• 关键词: SaTC; STARSS; Small; IoT; Circuit

Autonomy, control and actuation opportunities offered by a colossal deployment of Internet of Things (IoT) open the door to a revolution in the way we live and interact with our environment. However, widespread adoption of IoT comes with the danger of its misuse for malicious purposes, threatening the loss of privacy, property, and life. The scope and reach of potential IoT security threat grows as fast as the number and reach of IoT devices. Hence, protecting the hardware of IoT cannot be left as an afterthought. This project aims to improve the security of the IoT devices throughout their manufacturing and operational lifespan.To secure the IoT devices throughout their manufacturing and operational lifespan, this proposal introduces IoT CLOAK - IoT Circuit Locking, Obfuscation & Authentication Kernel. CLOAK is a compilable, universal and lightweight architecture for secure production, testing, cloud activation & operation of IoT devices. The major goals of this project include: (1) building an open-source compiler to synthesize any netlist into CLOAK-protected and CLOAK-obfuscated netlist; (2) making the obfuscation-key a truly moving target that changes from activation to activation; (3) removing the need to store keys on the IoT devices or on the cloud by generating it on demand on the cloud; (4) exploring lightweight cryptography, and its side channel vulnerabilities, to secure the IoT-Cloud communication; (5) addressing the challenge of safe readout of PUF signature from IoT device; (6) investigating ultra-lightweight PUF and TRNG solutions; (7) investigating the functional testing of the CLOAK-protected chips in untrusted facilities and (8) developing cloud-based CLOAK-management services capable of configuring, managing, unlocking, licensing, and authenticating CLOAK-protected IoT devices.

物联网（IoT）的巨大部署提供了自主、控制和驱动的机会，为我们生活和与环境互动的方式的革命打开了大门。然而，物联网的广泛采用伴随着其被滥用于恶意目的的危险，威胁着隐私，财产和生命的损失。潜在物联网安全威胁的范围和范围与物联网设备的数量和范围一样快。因此，保护物联网的硬件不能作为事后的想法。该项目旨在提高物联网设备在整个制造和运行寿命期间的安全性。为了确保物联网设备在整个制造和运行寿命期间的安全，该提案引入了物联网CLOAK -物联网电路锁定，混淆认证内核。CLOAK是一种可编译、通用和轻量级的架构，用于物联网设备的安全生产、测试和云激活操作。该项目的主要目标包括：（1）构建一个开源编译器，将任何网表合成为CLOAK保护和CLOAK混淆的网表;（2）使混淆密钥成为一个真正的移动目标，从激活到激活不断变化;（3）通过在云上按需生成密钥，消除在物联网设备或云上存储密钥的需要;（4）探索轻量级密码学及其侧信道漏洞，以保护物联网云通信;（5）解决从物联网设备安全读取PUF签名的挑战;（6）研究超轻量级PUF和TRNG解决方案;（7）研究在不受信任的设施中对受CLOAK保护的芯片进行功能测试，以及（8）开发基于云的CLOAK管理服务，能够配置、管理、解锁、许可和认证受CLOAK保护的物联网设备。

项目成果

LUT-Lock: A Novel LUT-Based Logic Obfuscation for FPGA-Bitstream and ASIC-Hardware Protection

LUT-Lock：一种新颖的基于 LUT 的逻辑混淆，用于 FPGA 比特流和 ASIC 硬件保护

• DOI: 10.1109/isvlsi.2018.00080
• 发表时间: 2018
• 期刊: 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI
• 作者: Mardani Kamali, Hadi;Zamiri Azar, Kimia;Gaj, Kris;Homayoun, Houman;Sasan, Avesta
• 通讯作者: Sasan, Avesta

Securing Hardware via Dynamic Obfuscation Utilizing Reconfigurable Interconnect and Logic Blocks

• DOI: 10.1109/dac18074.2021.9586242
• 发表时间: 2021-12
• 期刊: 2021 58th ACM/IEEE Design Automation Conference (DAC)
• 作者: Gaurav Kolhe;Soheil Salehi;T. Sheaves;H. Homayoun;S. Rafatirad;Sai Manoj Pudukotai Dinakarrao;Avesta Sasan

SRCLock: SAT-Resistant Cyclic Logic Locking for Protecting the Hardware

SRCLock：用于保护硬件的抗 SAT 循环逻辑锁定

• 发表时间: 2018
• 期刊: Proceedings of the 2018 on Great Lakes Symposium on VLSI
• 作者: Roshanisefat, Shervin;Mardani Kmali, Hadi;Sasan, Avesta
• 通讯作者: Sasan, Avesta

SAT-Hard Cyclic Logic Obfuscation for Protecting the IP in the Manufacturing Supply Chain

用于保护制造供应链中的 IP 的 SAT-Hard 循环逻辑混淆

• DOI: 10.1109/tvlsi.2020.2968552
• 发表时间: 2020
• 期刊: IEEE Transactions on Very Large Scale Integration (VLSI
• 作者: Roshanisefat, Shervin;Mardani Kamali, Hadi;Homayoun, Houman;Sasan, Avesta
• 通讯作者: Sasan, Avesta

Learning Assisted Side Channel Delay Test for Detection of Recycled ICs

用于检测回收 IC 的学习辅助侧通道延迟测试

• DOI: 10.1145/3394885.3431640
• 发表时间: 2021
• 期刊: ASPDAC '21: Proceedings of the 26th Asia and South Pacific Design Automation Conference
• 作者: Vakil, Ashkan;Niknia, Farzad;Mirzaeian, Ali;Sasan, Avesta;Karimi, Naghmeh
• 通讯作者: Karimi, Naghmeh