SHF: Small: Collaborative Research: Reusable Tools for Formal Modeling of Machine Code

SHF：小型：协作研究：用于机器代码形式化建模的可重用工具

• 批准号: 1624125
• 负责人: Gang Tan
• 金额: $ 1.39万
• 依托单位: Pennsylvania State Univ University Park
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2016
• 资助国家: 美国
• 起止时间: 2016-02-01 至 2016-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1624125&HistoricalAwards=false
• 关键词: SHF; Small; Collaborative; Research; Reusable

Recent advances in program verification show that we are on the verge of being able to prove correctness of safety and security critical software systems. But the proofs only establish correctness with respect to a model of the underlying processor on which the code executes. Unfortunately, the community lacks high-fidelity, carefully tested specifications of widely-used processors, such as Intel's x86 family of processors. This severely limits efforts in making software reliable and secure, from software assurance to malware analysis to sandboxing technologies. The goal of this project is to provide tools for building, reasoning about, and validating models of widely-used processors. The proposed research will result in public specifications of common processors, which will benefit a wide range of software applications. It will help improve the dependability and security of critical software applications. The investigators' approach to building processor models is carefully designed to support reuse of components across different architectures and different applications. In particular, they propose to formalize two domain-specific languages that will make it easy to specify decoders and instruction semantics. The tools for these languages will include support for efficient execution so that the models can be tested against implementations. To demonstrate the efficacy of these tools, the investigators will build and validate models of both the x86 and ARM families of processors. They will also investigate applications of these models by building correctness proofs of verifiers for inlined reference monitors and by integrating them as the target languages of a verified compiler. The investigators plan to expend efforts on building a community of researchers for formal processor models and to involve this community to give feedback, improve, and use the models. The project will also provide excellent opportunities for training undergraduate students and for developing new curriculum materials on formal methods.

程序验证的最新进展表明，我们即将能够证明安全和安保关键软件系统的正确性。但这些证明仅证明了代码执行的底层处理器模型的正确性。 不幸的是，社区缺乏广泛使用的处理器（例如英特尔 x86 系列处理器）的高保真、经过仔细测试的规格。这严重限制了从软件保障到恶意软件分析再到沙箱技术的软件可靠性和安全性方面的努力。该项目的目标是提供用于构建、推理和验证广泛使用的处理器模型的工具。 拟议的研究将产生通用处理器的公共规范，这将有利于广泛的软件应用程序。它将有助于提高关键软件应用程序的可靠性和安全性。研究人员构建处理器模型的方法经过精心设计，以支持跨不同架构和不同应用程序的组件重用。 特别是，他们建议形式化两种特定于领域的语言，这将使指定解码器和指令语义变得容易。 这些语言的工具将包括对高效执行的支持，以便可以根据实现来测试模型。 为了展示这些工具的功效，研究人员将构建并验证 x86 和 ARM 系列处理器的模型。 他们还将通过为内联引用监视器构建验证器的正确性证明并将它们集成为经过验证的编译器的目标语言来研究这些模型的应用。研究人员计划努力建立一个正式处理器模型的研究人员社区，并让该社区参与提供反馈、改进和使用模型。该项目还将为培训本科生和开发正式方法的新课程材料提供极好的机会。