SHF:Small: Collaborative Research: Tailoring Memory Systems for Data-Intensive HPC Applications

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High-performance computing is of strategic importance for computational science and engineering in the United States, and is on an accelerated path to sustaining scientific discovery at much increased flops. To advance the scientific discovery to the next level and allow new science missions to be accomplished in a timely manner, it is critical to address the memory performance holistically in high-performance computing platforms. This project provides architectural and system support and optimization for building memory systems tailored for data-intensive applications, e.g., big data analytics. This project offers research and educational opportunities for both undergraduate and graduate students, and trains a new generation of computer scientists and engineers in the area of high-performance computing. The objective of this project is to address the research challenges in building an efficient memory system by designing new techniques from several aspects. It develops a novel centralized memory refresh scheme at the cluster-level to manage memory refresh overhead, which has been increasingly performance-impacting and energy-consuming. It designs a new memory scheduling policy, taking advantages of new memory characteristics. It makes memory characteristics/peculiarities be available to the processor and operating system, so that they can make well-informed decisions to fully exploit memory performance potentials. It leverages in-memory computing to enable efficient in-situ processing. The integration of all these techniques provides a holistic solution to building an efficient memory system tailored for data-intensive applications.