SHF: Small: Soft-FET: Phase Transition Material Based Soft Switching Field Effect Transistor for Energy Efficient CMOS

随着计算系统的快速发展，从数十亿的物联网设备到高性能的超大规模超级计算机，节能设计是绝对必要的。在现代片上系统(SoC)设计中，电源电压调节是降低功耗的主要驱动因素。峰值开关电流引起的电压下降以及各逻辑块电流活动的突然变化需要更大的电压保护带，从而降低了系统级的能效。因此，迫切需要开发电路拓扑来降低峰值开关电流以及突然的电流波动，以减小电压跌落，并实现紧凑和节能的电力输送网络。该项目研究的基本原理可以很容易地转移到现有的SoC设计中，使集成芯片设计行业受益，并最终惠及消费社会。从事这项研究的学生将在器件制造、集成电路、测试芯片设计和异质系统集成问题方面进行培训，从而为芯片设计行业的劳动力发展做出贡献。本研究设想了一种新的软开关晶体管架构，称为Soft-FET，用于实现高能效的CMOS电路。利用过渡金属氧化物中的突变相变行为可以实现目标有效的操作。该项目将通过与基线CMOS工艺的异质集成来制作和演示基于二氧化钒(VO2)的软场效应管集成电路原型。将研究各种软场效应管结构电路模块，如数字逻辑、SRAM位单元/阵列、I/O缓冲器、功率门和功率转换器，以实现节能的CMOS设计。如果成功，这项研究可以通过降低电压下降保护频段来提高集成电路的能效。这一奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

With the rapid advances in computing systems spanning from billions of IoT (Internet of Things) devices to high performance exa-scale supercomputers, energy efficient design is an absolute must. In a modern System-on-a chip (SoC) design, supply voltage scaling is the primary driver to reduce the energy consumption. Voltage droops caused by the peak switching current as well sudden changes in current activity of various logic blocks requires larger voltage guard-bands, thereby degrading the system level energy efficiency. Thus, there is a critical need to develop circuit topologies to reduce the peak switching currents as well as sudden current fluctuations to reduce the voltage droops and to realize a compact and energy-efficient power delivery network. Principles underlying the research in this project can be readily transferred to existing SoC designs benefiting the integrated chip design industry, and ultimately the consumer society. The students engaged in this research will be trained in device fabrication, integrated circuit, test-chip design, and heterogeneous system integration issues, thus contributing to the much needed workforce development in chip design industry.This research envisions a novel soft-switching transistor architecture named as Soft-FET for realizing energy-efficient CMOS circuits. The targeted efficient operations can be realized by utilizing abrupt phase change behavior in transition metal oxides. The project will fabricate and demonstrate Vanadium Dioxide (VO2) based Soft-FET integrated circuit prototype by heterogeneous integration with baseline CMOS technology. Various Soft-FET architecture circuit blocks such as digital logic, SRAM bitcells/arrays, I/O buffers, power gates, and power converters will be investigated to realize energy efficient CMOS designs. If successful, this research can improve the energy efficiency of integrated circuits by lowering the voltage droop guard bands.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.