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SHF: Small: Soft-FET: Phase Transition Material Based Soft Switching Field Effect Transistor for Energy Efficient CMOS

SHF：小型：软 FET：用于节能 CMOS 的基于相变材料的软开关场效应晶体管

基本信息

批准号：
1815616
负责人：
Jaydeep Kulkarni
金额：
$ 40万
依托单位：
University of Texas at Austin
依托单位国家：
美国
项目类别：
Standard Grant
财政年份：
2018
资助国家：
美国
起止时间：
2018-10-01 至 2023-03-31
项目状态：
已结题

来源：
https://www.nsf.gov/awardsearch/showAward?AWD_ID=1815616&HistoricalAwards=false
关键词：
SHF Small Soft FET Phase

项目摘要

With the rapid advances in computing systems spanning from billions of IoT (Internet of Things) devices to high performance exa-scale supercomputers, energy efficient design is an absolute must. In a modern System-on-a chip (SoC) design, supply voltage scaling is the primary driver to reduce the energy consumption. Voltage droops caused by the peak switching current as well sudden changes in current activity of various logic blocks requires larger voltage guard-bands, thereby degrading the system level energy efficiency. Thus, there is a critical need to develop circuit topologies to reduce the peak switching currents as well as sudden current fluctuations to reduce the voltage droops and to realize a compact and energy-efficient power delivery network. Principles underlying the research in this project can be readily transferred to existing SoC designs benefiting the integrated chip design industry, and ultimately the consumer society. The students engaged in this research will be trained in device fabrication, integrated circuit, test-chip design, and heterogeneous system integration issues, thus contributing to the much needed workforce development in chip design industry.This research envisions a novel soft-switching transistor architecture named as Soft-FET for realizing energy-efficient CMOS circuits. The targeted efficient operations can be realized by utilizing abrupt phase change behavior in transition metal oxides. The project will fabricate and demonstrate Vanadium Dioxide (VO2) based Soft-FET integrated circuit prototype by heterogeneous integration with baseline CMOS technology. Various Soft-FET architecture circuit blocks such as digital logic, SRAM bitcells/arrays, I/O buffers, power gates, and power converters will be investigated to realize energy efficient CMOS designs. If successful, this research can improve the energy efficiency of integrated circuits by lowering the voltage droop guard bands.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

随着计算系统的快速发展，从数十亿物联网（IoT）设备到高性能的exa级超级计算机，节能设计是绝对必要的。在现代片上系统（SoC）设计中，电源电压调节是降低能耗的主要驱动因素。由峰值开关电流引起的电压下降以及各种逻辑块的电流活动的突然变化需要更大的电压保护带，从而降低了系统级能量效率。因此，迫切需要开发电路拓扑以减少峰值开关电流以及突然的电流波动，从而减少电压下降并实现紧凑且节能的电力输送网络。本项目研究的基本原理可以很容易地转移到现有的SoC设计中，从而使集成芯片设计行业受益，并最终使消费者社会受益。本研究的学生将接受器件制造、集成电路、测试芯片设计和异构系统集成问题的培训，从而为芯片设计行业急需的人才培养做出贡献。本研究设想了一种新型的软开关晶体管结构，称为Soft-FET，用于实现节能CMOS电路。通过利用过渡金属氧化物中的突变相变行为可以实现目标有效操作。该项目将通过与基准CMOS技术的异构集成来制造和演示基于二氧化钒（VO2）的软FET集成电路原型。各种软场效应管架构的电路模块，如数字逻辑，SRAM位单元/阵列，I/O缓冲器，电源门，和电源转换器将进行研究，以实现节能CMOS设计。如果成功，这项研究可以通过降低电压下降保护带来提高集成电路的能效。该奖项反映了NSF的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

项目成果

期刊论文数量（6）

专著数量（0）

科研奖励数量（0）

会议论文数量（0）

专利数量（0）

Radiation Hardened Memory and Logic using Phase Transition Material

使用相变材料的抗辐射存储器和逻辑

DOI：
发表时间：
2019
期刊：
Government Microelectronic Conference
影响因子：
0
作者：
Kulkarni, Jaydeep .;Nibhanupudi, S.S. Teja
通讯作者：
Nibhanupudi, S.S. Teja

Soft-FET: Phase transition material assisted Soft switching F ield E ffect T ransistor for supply voltage droop mitigation

软 FET：相变材料辅助软开关场效应晶体管，用于缓解电源电压下降

DOI：
10.1109/dac.2018.8465768
发表时间：
2018
期刊：
Design Automation Conference
影响因子：
0
作者：
Teja, Subrahmanya;Kulkarni, Jaydeep P.
通讯作者：
Kulkarni, Jaydeep P.

Enabling In-Memory Computations in Non-Volatile SRAM Designs

在非易失性 SRAM 设计中启用内存计算

DOI：
10.1109/jetcas.2022.3174148
发表时间：
2022
期刊：
IEEE Journal on Emerging and Selected Topics in Circuits and Systems
影响因子：
4.6
作者：
Sundara Raman, Siddhartha Raman;Nibhanupudi, S. S.;Kulkarni, Jaydeep P.
通讯作者：
Kulkarni, Jaydeep P.

Threshold Selector and Capacitive Coupled Assist Techniques for Write Voltage Reduction in Metal–Ferroelectric–Metal Field-Effect Transistor

用于降低金属-铁电-金属场效应晶体管写入电压的阈值选择器和电容耦合辅助技术

DOI：
10.1109/ted.2021.3121348
发表时间：
2021
期刊：
IEEE Transactions on Electron Devices
影响因子：
3.1
作者：
Raman, Siddhartha Raman;Nibhanupudi, S. S.;Saha, Atanu K.;Gupta, Sumeet;Kulkarni, Jaydeep P.
通讯作者：
Kulkarni, Jaydeep P.

Phase Transition Material-Assisted Low-Power SRAM Design

相变材料辅助低功耗 SRAM 设计